Publikationen - Dr.-Ing. J. Becker

Artikel


2004

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Becker, M.; Lotze, N.; Becker, J.; Ortmanns, M.; Manoli, Y.
Implementation of a Power Optimized Decimator for Cascaded Sigma-Delta A/D Converters
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland,
2004
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Becker, J.; Manoli, Y.
Eine FPAA-Architektur zur rekonfigurierbaren Instantiierung von zeitkontinuierlichen Analogfiltern
in Proc. Advances in Radio Science, vol. 3, Issue 14, p.371-375, Miltenberg, Germany,
2004
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Becker, J.; Manoli, Y.
A new architecture of field programmable analog arrays for reconfigurable instantiation of continuous-time filters
in Proc. IEEE International Conference on Field-Programmable Technology (ICFPT), Brisbane, Australia,
2004
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Becker, J.; Manoli, Y.
A Continuous-Time Field Programmable Analog Array (FPAA) consisting of digitally reconfigurable G_m-cells
in Proc. IEEE International Symposium on Circuits and Systems (ISCAS), I- 1092-5 Vol.1, Vancouver,
2004

2001

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Langeheine, J.; Becker, J.; Fölling, S.; Meier, K.; Schemmel, J.
Initial Studies of a New VLSI Field Programmable Transistor Array
Evolvable Systems: From Biology to Hardware, Proceedings of the Fourth International Conference (ICES),
2001
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Becker, J.
Ein FPGA-basiertes Testsystem für gemischt analog/digitale ASICs
Diploma Thesis, Heidelberg,
2001
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Langeheine, J.; Becker, J.; Fölling, S.; Meier, K.; Schemmel, J.
A CMOS FPTA Chip for Intrinsic Hardware Evolution of Analong Electronic Circuits
The Third NASA/DoD workshop on Evolvable Hardware,
2001