Publications - Dr.-Ing. J. G. Kauffman

Papers  Patents

Papers

2018

21.
Sauerbrey, J.; San Pablo Garcia, J.; Schütz, U.; Khushk, H.; Kauffman, J. G.
A Multi-mode GSM to LTE100 ADC
ESSCIRC 2018 - 44th IEEE European Solid State Circuits Conference, Dresden, Germany
September 2018
https://ieeexplore.ieee.org/document/8494250/

2016

20.
Ritter, R.; Kauffman, J. G.; Becker, J.; Ortmanns, M.
A 10 MHz Bandwidth, 70 dB SNDR Continuous Time Delta-Sigma Modulator With Digitally Improved Reconfigurable Blocker Rejection
IEEE Journal of Solid-State Circuits, vol. 51, no. 3, pp. 660-670
March 2016

2014

19.
Chu, C.; Kauffman, J. G.; Anders, J.; Becker, J.; Ortmanns, M.; Epp, M.; Chartier, S.
A 1.92-GS/s CT ΔΣ modulator with 70-db DR and 78-db SFDR in 15-MHz bandwidth
IEEE NEWCAS 2014, Trois-Rivières, Kanada
June 2014
18.
Kauffman, J. G.; Witte, P.; Lehmann, M.; Becker, J.; Manoli, Y.; Ortmanns, M.
A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW
IEEE Journal of Solid-State Circuits, Vol. 49, No. 2
February 2014
https://ieeexplore.ieee.org/document/6674069

2013

17.
Kauffman, J. G.; Chu, C.; Becker, J.; Ortmanns, M.
A 67 dB DR 50MHz BW CT Delta Sigma Modulator Achieving 207 fJ/conv
Asian Solid-State Circuits Conference, Singapore
November 2013
16.
Kauffman, J. G.; Ritter, R.; Chu, C.; Ortmanns, M.
A Native Switched DAC Cell with low ISI for CT Delta Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China
May 2013
15.
Chu, C.; Brückner, T.; Kauffman, J. G.; Anders, J.; Becker, J.; Ortmanns, M.
Analysis and Design of High Speed/High Linearity CT Delta Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China
May 2013
14.
Ritter, R.; Kauffman, J. G.; Lorenz, M.; Ortmanns, M.
Integrator Swing Reduction in Feedback Compensated Sigma Delta Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China
May 2013
13.
Kauffman, J. G.; Ritter, R.; Chu, C.; Becker, J.; Ortmanns, M.
Low Power Quantizer Design in CT Delta Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Beijing, China
May 2013

2012

12.
Chu, C.; Kauffman, J. G.; Ortmanns, M.
A 12-bit continuous-time third Order ΔΣ Modulator with 85dBFS SFDR in a 15MHz BW
Kleinheubacher Tagung 2012, Miltenberg, Germany
September 2012
11.
Witte, P.; Kauffman, J. G.; Becker, J.; Manoli, Y.; Ortmanns, M.
A 72dB-DR Delta-Sigma CT Modulator Using Digitally Estimated Auxiliary DAC Linearization Achieving 88fJ/conv in a 25 MHz BW
IEEE International Conference on Solid-State Circuits (ISSCC), San Francisco, USA
February 2012
10.
Ritter, R.; Kauffman, J. G.; Ortmanns, M.
A power efficient MDAC design with correlated double sampling for a 2-step-flash ADC
IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea
May 2012
9.
Angele, D.; Stein, M.; Kauffman, J. G.; Ortmanns, M.; Becker, J.
A reconfigurable Continuous-Time ΔΣ-ADC using a digitally programmable gm-C array
IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)
2012
8.
Witte, P.; Kauffman, J. G.; Brückner, T.; Becker, J.; Ortmanns, M.
An Error Estimation Technique for Lowpass and Bandpass Delta-Sigma ADC Feedback DACs Using a Residual Test Signal
IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, Korea
May 2012
7.
Kauffman, J. G.; Rieger, V.; Ritter, R.; Anders, J.; Ortmanns, M.
Design of a 5bit 1GSps VCO Quantizer for a CT Delta Sigma Modulator
Conference on Ph.D. Research in Microelectronics & Electronics (PRIME), Aachen, Germany
June 2012
6.
Kauffman, J. G.; Brückner, T.; Ortmanns, M.
PVT Robust Design of Wideband CT Delta Sigma Modulators Including Finite GBW Compensation
The 55th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Boise, Idaho, USA
August 2012

2011

5.
Chu, C.; Kauffman, J. G.; Anis, S.; Ortmanns, M.
A 4-bit, 500M/s Flash Quantizer Using an Auto-Zeroing Offset Compensated Comparator in 250nm SiGe
Kleinheubacher Tagung, Miltenberg, Germany
September 2011
4.
Witte, P.; Kauffman, J. G.; Becker, J.; Ortmanns, M.
A digital background correction for DAC nonlinearities in lowpass and bandpass delta-sigma modulators - theory and implementation
The 9th Int. Conf. on Sampling Theory and Applications (SampTA), Singapore
May 2011
3.
Kauffman, J. G.; Witte, P.; Becker, J.; Ortmanns, M.
An 8.5 mW Continuous-Time Delta-Sigma Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR
IEEE Journal of Solid-State Circuits
December 2011
2.
Kauffman, J. G.; Witte, P.; Becker, J.; Ortmanns, M.
An 8mW 50MS/s CT ΔΣ Modulator with 81dB SFDR and Digital Background DAC Linearization
IEEE Int. Conf. on Solid State Circuits (ISSCC), San Francisco, USA
February 2011
1.
Witte, P.; Kauffman, J. G.; Becker, J.; Ortmanns, M.
Correlation Based Background Error Estimation Technique for Bandpass Delta-Sigma ADC DACs
IEEE Trans. Circuits Syst. II, Express Briefs
November 2011

Patents

  1. John G. Kauffman
    Low supply class AB output amplifier
    [US9859856B1], Intel IP Corp.

  2. Marco Bresciani, John G. Kauffman, Udo Schuetz, Patrick Torta, Francesco Conzatti 
    Sigma-delta analog-to-digital converter including loop filter having components for feedback digital-to-analog converter correction
    [US9866227B1]
    2016

  3. John G. Kauffman, Krzysztof Dufrene
    Apparatus for overload recovery of an integrator in a sigma-delta modulator
    [US9680496B2], Intel IP Corp.
    2015

  4. John G. Kauffman, Udo Schuetz
    Single amplifer bi-quad sigma-delta modulator
    [US9559719B1], Intel IP Corp.
    2015

  5. John G. Kauffman, Udo Schuetz
    Apparatus for correcting linearity of a digital-to-analog converter
    [US9509326B1], Intel IP Corp.
    2015