Dr.-Ing. Rudolf Ritter

Dr.-Ing. Rudolf Ritter
Institut für Mikroelektronik

»Delta-Sigma Modulators with Enhanced Interferer Cancellation in Receiver Applications«

In radio communications the amount of data transmitted worldwide is and will steadily increase. This results from increasing maximum data rates, but also from the increasing number of transmitters and users available. Although most data, which is transmitted nowadays, is digital, it is transmitted in an analog fashion through the air, i.e., in a physical environment. Hence, analog signal processing will always be necessary.  Consequently, analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) are essential components in transceivers as they are the connection between the analog and the digital world.

The ADC is a bottleneck within the receiver and therefore limits the maximum data rates. Pushing its performance limit results in increased power consumption, and thus reduced battery life time for, e.g., mobile devices, and in increased receiver area which increases the production cost. Furthermore, due to the rising amount of data and the number of transmitters available the environment of a transceiver is full of interfering signals generated by other transmitters or the transceiver itself, which needs to be handled as well. 

Therefore, the objective of current research is to push the limits with a minimum cost in power and area, together with full functionality in an interferer polluted environment.

A block diagram of a common receiver architecture is visualized in Figure 1. A desired (RX) signal is received together with many interferer signals, visualized in the frequency domain. These signals are processed by several analog signal processing steps, including filter stages to suppress the interferers, until they are converted into the digital domain by the ADC. 

This work focused on the interferer robustness of delta-sigma ADCs, which is a widely used ADC topology for receiver applications. Thereby the interference robustness is seen as the enabler for reduced power and area, as this consequently relaxes the requirements for the preceding filter stages. To achieve this objective, the requirements on the delta-sigma ADC as well as a system level analysis are discussed to guarantee the operation in presence of interfering signals. A new technique is presented, where a digital circuit increases the ADCs robustness regarding interfering signals.

This new technique measures the interferer digital subsequently to the ADC and feeds it back to the ADCs input in a cancelling manner. This leads to a strong reduction of the interferers amplitude, comparable to the digital noise cancellation of modern headphones reducing the background noise level. Consequently, the ADC only needs to process a strongly reduced interferer signal which finally increases its interferer robustness. This new technique was developed towards a microchip and successfully measured in the laboratory. It could be shown that the interferer robustness can be increased by more than a factor of two.

The developed technique is purely digital and therefore gains from future technology scaling, especially in terms of reduced power and area consumption and it is additionally reconfigurable to different specifications. Thus, it can be stated as a good candidate also for future radio receivers.

 Figure 1: Block diagram of a common receiver architecture: the homodyne-receiver.

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