Papers
2006
38.
Becker,
M.;
Lotze,
N.;
Ortmanns,
M.;
Manoli,
Y.
Implementation and Analysis of Power Consumption for a Power Optimized Decimator Designed for Cascaded Sigma-Delta A/D Converters
IEEE International Midwest Symposium on Circuits and Systems, 2006. MWSCAS 2006, San Juan, Puerto Rico
2006
Implementation and Analysis of Power Consumption for a Power Optimized Decimator Designed for Cascaded Sigma-Delta A/D Converters
IEEE International Midwest Symposium on Circuits and Systems, 2006. MWSCAS 2006, San Juan, Puerto Rico
2006
37.
Ortmanns,
M.
Modellierung und Simulation zeitkontinuierlicher Sigma-Delta A/D Umsetzer
Advances in Radio Science Vol. 5 (Kleinheubacher Berichte), Miltenberg, Germany
2006
Modellierung und Simulation zeitkontinuierlicher Sigma-Delta A/D Umsetzer
Advances in Radio Science Vol. 5 (Kleinheubacher Berichte), Miltenberg, Germany
2006
36.
Gerfers,
F.;
Ortmanns,
M.;
Schmitz,
P.
A Transistor-based Clock Jitter Insensitive DAC Architecture
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kos Island, Greece
2006
A Transistor-based Clock Jitter Insensitive DAC Architecture
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kos Island, Greece
2006
35.
Ortmanns,
M.;
Unger,
N.;
Rocke,
A.;
Gehrke,
M.;
Tiedtke,
H.-J.
A Retina Stimulator ASIC with 232 Electrodes, Custom ESD Protection and Active Charge Balancing
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kos Island, Greece
2006
A Retina Stimulator ASIC with 232 Electrodes, Custom ESD Protection and Active Charge Balancing
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kos Island, Greece
2006
34.
Ortmanns,
M.;
Unger,
N.;
Rocke,
A.;
Gehrke,
M.;
Tiedtke,
H.-J.
A 0.1mm², digitally programmable stimulation pad cell for a retinal implant with high-voltage capability
IEEE Int. Conf. on Solid State Circuits (ISSCC), San Francisco, USA
2006
A 0.1mm², digitally programmable stimulation pad cell for a retinal implant with high-voltage capability
IEEE Int. Conf. on Solid State Circuits (ISSCC), San Francisco, USA
2006
2005
33.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
A Case Study On A 2-1-1 Cascaded Continuous-Time Sigma-Delta Modulator
IEEE Trans. on Circuits and Systems I, Vol.52, No.8, pp. 1515-1525
2005
A Case Study On A 2-1-1 Cascaded Continuous-Time Sigma-Delta Modulator
IEEE Trans. on Circuits and Systems I, Vol.52, No.8, pp. 1515-1525
2005
32.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
A Continuous-Time Sigma-Delta Modulator with Reduced Sensitivity to Clock Jitter through SCR-feedback
IEEE Trans. on Circuits and Systems I, Vol.52, No.5, pp. 875-884
2005
A Continuous-Time Sigma-Delta Modulator with Reduced Sensitivity to Clock Jitter through SCR-feedback
IEEE Trans. on Circuits and Systems I, Vol.52, No.5, pp. 875-884
2005
31.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Increased Jitter Sensitivity in Continuous- and Discrete-Time Sigma-Delta Modulators due to finite OpAmp Settling Speed
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kobe, Japan
2005
Increased Jitter Sensitivity in Continuous- and Discrete-Time Sigma-Delta Modulators due to finite OpAmp Settling Speed
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kobe, Japan
2005
2004
30.
Gerfers,
F.;
Ortmanns,
M.;
Manoli,
Y.
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT sigma-delta modulators
IEEE Symposium on Circuits and Systems, Vancouver, Canada
2004
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT sigma-delta modulators
IEEE Symposium on Circuits and Systems, Vancouver, Canada
2004
29.
Keller,
M.;
Ortmanns,
M.;
Manoli,
Y.
On the Implicit Anti-Aliasing Filter in Continuous Time Sigma Delta Modulators
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland
2004
On the Implicit Anti-Aliasing Filter in Continuous Time Sigma Delta Modulators
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland
2004
28.
Becker,
M.;
Lotze,
N.;
Becker,
J.;
Ortmanns,
M.;
Manoli,
Y.
Implementation of a Power Optimized Decimator for Cascaded Sigma-Delta A/D Converters
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland
2004
Implementation of a Power Optimized Decimator for Cascaded Sigma-Delta A/D Converters
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland
2004
27.
Becker,
M.;
Lotze,
N.;
Becker,
J.;
Ortmanns,
M.;
Manoli,
Y.
Implementierung eines verlustleistungsoptimierten Dezimators für kaskadierte Sigma-Delta Analog-Digital Umsetzer
Advances in Radio Science Vol. 3 (Kleinheubacher Berichte 2004), pp. 389-393, Miltenberg, Germany
2004
Implementierung eines verlustleistungsoptimierten Dezimators für kaskadierte Sigma-Delta Analog-Digital Umsetzer
Advances in Radio Science Vol. 3 (Kleinheubacher Berichte 2004), pp. 389-393, Miltenberg, Germany
2004
26.
Ortmanns,
M.;
Peters,
C.;
Manoli,
Y.;
Schmelzeisen,
R.;
Gutwald,
R.
A Pressure Sensor based in-vivo Stress Measurement in Osteosynthesis
Eurosensors XVIII, Rom, Italy
2004
A Pressure Sensor based in-vivo Stress Measurement in Osteosynthesis
Eurosensors XVIII, Rom, Italy
2004
25.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
A New Technique for Automatic Error Correction in Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kobe, Japan
2004
A New Technique for Automatic Error Correction in Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kobe, Japan
2004
24.
Ortmanns,
M.;
Gerfers,
F.;
Kuderer,
M.;
Manoli,
Y.
A Cascaded Continuous-Time Sigma-Delta Modulator with 80 dB Dynamic Range
IEEE Int. Symp. on Circuits and Systems (ISCAS), Vancouver, Canada
2004
A Cascaded Continuous-Time Sigma-Delta Modulator with 80 dB Dynamic Range
IEEE Int. Symp. on Circuits and Systems (ISCAS), Vancouver, Canada
2004
23.
Ortmanns,
M.;
Peters,
C.;
Manoli,
Y.;
Schmelzeisen,
R.;
Gutwald,
R.
A Novel Method for in-vivo Stress Measurement in Osteosynthesis
Biomedizinische Technik BMT, Ilmenau, Germany
2004
A Novel Method for in-vivo Stress Measurement in Osteosynthesis
Biomedizinische Technik BMT, Ilmenau, Germany
2004
2003
22.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
The implementation of a continuous-time sigma-delta modulator with reduced sensitivity to clock jitter
GMM/GI/ITG Fachtagung - Entwurf Integrierter Schaltungen und Systeme, E.I.S.-Workshop, Erlangen, Germany
2003
The implementation of a continuous-time sigma-delta modulator with reduced sensitivity to clock jitter
GMM/GI/ITG Fachtagung - Entwurf Integrierter Schaltungen und Systeme, E.I.S.-Workshop, Erlangen, Germany
2003
21.
Gerfers,
F.;
Ortmanns,
M.;
Manoli,
Y.
A 1V, 12-Bit Wideband Continuous-Time Sigma-Delta Modulator for UMTS Applications
IEEE Symposium on Circuits and Systems, Bangkok, Thailand
2003
A 1V, 12-Bit Wideband Continuous-Time Sigma-Delta Modulator for UMTS Applications
IEEE Symposium on Circuits and Systems, Bangkok, Thailand
2003
20.
Gerfers,
F.;
Ortmanns,
M.;
Manoli,
Y.
A 1.5-V, 12-bit Power-Efficient Continuous-Time Third-Order Sigma-Delta Modulator
IEEE Journal of Solid State Circuits, Vol.38, No.8, pp. 1343-1352
2003
A 1.5-V, 12-bit Power-Efficient Continuous-Time Third-Order Sigma-Delta Modulator
IEEE Journal of Solid State Circuits, Vol.38, No.8, pp. 1343-1352
2003
19.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
The implementation of a continuous-time sigma-delta modulator with reduced sensitivity to clock jitter
GMM/GI/ITG Fachtagung - Entwurf Integrierter Schaltungen und Systeme, E.I.S.-Workshop, Erlangen, Germany
2003
The implementation of a continuous-time sigma-delta modulator with reduced sensitivity to clock jitter
GMM/GI/ITG Fachtagung - Entwurf Integrierter Schaltungen und Systeme, E.I.S.-Workshop, Erlangen, Germany
2003
18.
Becker,
M.;
Heiber,
K.;
Ortmanns,
M.;
Manoli,
Y.
A Power Optimized Decimator Architecture for Cascaded Sigma-Delta Analog-to-Digital Converters
International Conference on Electronics, Circuits and Systems, Sharjah, UAE
2003
A Power Optimized Decimator Architecture for Cascaded Sigma-Delta Analog-to-Digital Converters
International Conference on Electronics, Circuits and Systems, Sharjah, UAE
2003
17.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Influence of finite Integrator Gain Bandwidth on Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Bangkok, Thailand
2003
Influence of finite Integrator Gain Bandwidth on Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Bangkok, Thailand
2003
16.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Fundamental Limits of Jitter Insensitivity in discrete and Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Bangkok, Thailand
2003
Fundamental Limits of Jitter Insensitivity in discrete and Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Bangkok, Thailand
2003
15.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Ein zeitkontinuierlicher Sigma-Delta Modulator mit Stromquellen-Rückkopplung und reduzierter Clock-Jitter Empfindlichkeit
ITG/ GMM -Diskussionssitzung ANALOG03, Heilbronn, Germany
2003
Ein zeitkontinuierlicher Sigma-Delta Modulator mit Stromquellen-Rückkopplung und reduzierter Clock-Jitter Empfindlichkeit
ITG/ GMM -Diskussionssitzung ANALOG03, Heilbronn, Germany
2003
14.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Compensation of Finite Gain-Bandwidth Induced Errors in Continuous-Time Sigma-Delta Modulators
IEEE Int. Conf. on Electronics, Circuits and Systems, Sharjah, UAE
2003
Compensation of Finite Gain-Bandwidth Induced Errors in Continuous-Time Sigma-Delta Modulators
IEEE Int. Conf. on Electronics, Circuits and Systems, Sharjah, UAE
2003
Books
Patents
- A. Herkle, J. Becker, M. Ortmanns
[DE] Verfahren und Vorrichtung zur Erzeugung einer digitalen Signatur
DE102016204055A1, Patent record available from the German Patent
2016 - R. Ritter, M. Schimper, W. Schelmbauer, M. Ortmanns
Analog-to-digital converter, signal processor, and method for analog-to-digital conversion.
US8760330, Patent record available from the US Patent Office
2014 - A. Rocke, M. Ortmanns und N. Unger
Device for controlling the electric charge on stimulation electrodes.
EP1827591, Patent record available from the European Patent
2007 - M. Ortmanns, Y. Manoli und F. Gerfers
Controlled power source, in particular for a digital/analogue converter in continuous time sigma/delta modulators.
EP1550222, Patent record available from the European Patent
2005 - A. Rocke, M. Ortmanns und N. Unger
Device for controlling the electric charge on stimulation electrodes.
WO06063743, Patent record available from the World Intellectual Property Organization (WIPO)
2006 - M. Ortmanns und Y. Manoli
Method for the characterisation of and for the automatic correction of linear errors in analog/digital converters.
WO05078936, Patent record available from the World Intellectual Property Organization (WIPO)
2005 - M. Ortmanns, Y. Manoli und F. Gerfers
Controlled power source, in particular for a digital/analogue converter in continuous time sigma/delta modulators.
WO04034588, Patent record available from the World Intellectual Property Organization (WIPO)
2004 - M. Ortmanns, Y. Manoli und F. Gerfers
Controlled current source, in particular for digital/analogue converters in continuous-time sigma/delta modulators.
US7151474, Patent record available from the US Patent Office
2006 - M. Ortmanns, Y. Manoli und F. Gerfers
Controlled power source, in particular for a digital/analogue converter in continuous time sigma delta modulators.
US20060055580, Patent record available from the US Patent Office
2006