www: [rp] = Bachelorarbeit, [mt] = Masterarbeit

  1. Amir Zohny
    A 4bit, 1GSps Low Power Flash ADC in 90nm CMOS [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  2. Xingchi Wang
    Fully differential neural recording channel design [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  3. Jie Lian
    Evaluation of current conveyor circuits for field programmable analog arrays [rp]
    Prof. Dr.-Ing. Maurits Ortmanns
  4. Abdel Marzouk
    Highly Efficient Power Management Circuit in CMOS for Implantable Systems [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  5. Philipp Schleicher
    Evaluation of the suitability of 3D animation programs and techniques for creating object-based test sequences [rp]
    Prof. Dr.-Ing. Albrecht Rothermel
  6. Mohammed Hassan
    Design of a 90nm CMOS Field Programmable Analog Array - Common mode control circuitry and a GHz output buffer [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  7. Mohammed Hamouda
    Design of a 90nm CMOS Field Programmable Analog Array - A widely tunable Gm-cell [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  8. Christian Feller
    Evaluation von Response Surface Modellierung zur Optimierung analoger Filtersynthese [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  9. Bernd Steinle
    Aufbau, Simulation und Charakterisierung einer > 6GBit/s Verbindungsstrecke über eine Backplane [rp]
    Nokia Siemens Networks GmbH & Co KG
    Prof. Dr.-Ing. Maurits Ortmanns
  10. Martin Stolpe
    Emulation von ΣΔ-Modulatoren auf FPGAs [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  11. Mohamed Samy
    Top level implementation and optimization of a two-step flash ADC [rp]
    Prof. Dr.-Ing. Maurits Ortmanns
  12. Helmuth Zekel
    Optimierung eines Delta-Sigma-DAC für Audioausgabe im FPGA [rp]
    Prof. Dr.-Ing. Maurits Ortmanns
  13. Leo Vepa
    Audio Quality Enhancement for Transmission Errors in Mobile DVB-T Receivers [mt]
    Prof. Dr.-Ing. Albrecht Rothermel
  14. Ketki Chawla
    A Study on Power Amplifier Design for Inductive Powering [rp]
    Prof. Dr.-Ing. Maurits Ortmanns
  15. Johannes Madel
    Intelligent Implantable CMOS Power Receiver with Adaptive Link Compensation [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  16. Volker Emmert
    The Implementation of a Two-step Quantizer for a Sigma Delta ADC in MATLAB [rp]
    Prof. Dr.-Ing. Maurits Ortmanns
  17. Vamsi Krishna Nambakam
    Analyse der Eigenschaften von Delta-Sigma-ADUs für die Anwendung in einem Impulserfassungssystem [mt]
    Fraunhofer-Institut, Erlangen
    Prof. Dr.-Ing. Maurits Ortmanns
  18. Leo Santak
    Hardware-/Software Platform Architectures for Distributed Industrial Control Systems [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  19. Bernd Rottler
    Architecture Exploration of microSD Host Controllers on a Programmable System-on-Chip [rp]
    Prof. Dr.-Ing. Maurits Ortmanns
  20. Rudolf Ritter
    A 4 bit 2 Step ADC for Sigma Delta Applications in SiGe 250nm Technology [mt]
    Prof. Dr.-Ing. Maurits Ortmanns
  21. Johannes Röttig
    Kompensation von I/Q-Fehlern mittels digitaler Filteralgorithmen [mt]

    Prof. Dr.-Ing. Maurits Ortmanns
  22. Christian Grumbein
    First-Order Sigma-Delta Analog to Digital Converters Based on FPGAs [rp]
    Prof. Dr.-Ing. Maurits Ortmanns
  23. Florian Unterstein
    Hardwaregestützte Motordrehzahlanalyse mittels Audiocharakteristik [rp]
    Prof. Dr.-Ing. Maurits Ortmanns
  24. Christian Crüger
    Anbindung von FPGA-Microcontrollern an Cloud Computing Dienste [mt]
    Prof. Dr.-Ing. Maurits Ortmanns