Publications - Dr.-Ing. J. Becker
Papers
2025
110.
P. Kässer,
O. Ismail,
J. Becker and
M. Ortmanns,
"Compensation of Excess Loop Delay in Continuous-Time Incremental ∆Σ ADCs",
IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom, pp. 1-5,
May
2025.
| DOI: | 10.1109/ISCAS56072.2025.11044169 |
109.
P. Kässer,
O. Ismail,
J. Becker and
M. Ortmanns,
"Does the Maximum Stable Amplitude depend on Reconstruction Filters in Incremental ∆Σ ADCs?",
IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom, pp. 1-5,
May
2025.
| DOI: | 10.1109/ISCAS56072.2025.11043924 |
108.
D. -. Wiens,
A. Abdelaal,
B. Driemeyer,
J. Becker,
J. G. Kauffman and
M. Ortmanns,
"A Direct Digitizing, 1MHz Bandwidth, 28fA/√Hz Current Sensing Front-End Based on a Mixed-Signal Integrator-Differentiator TIA in 28nm CMOS",
IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA,
Apr.
2025.
| DOI: | 10.1109/CICC63670.2025.10983397 |
107.
B. Driemeyer,
H. Mandry,
D. -. Wiens,
J. Becker,
J. G. Kauffman and
M. Ortmanns,
"17.5 An Eye-Opening Arbiter PUF for Fingerprint Generation Using Auto-Error Detection for PVT-Robust Masking and Bit Stabilization Achieving a BER of 2e-8 in 28nm CMOS",
IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA,
Feb.
2025.
106.
H. Mandry,
B. Driemeyer,
J. Becker and
M. Ortmanns,
"Investigation of the Influence of Multi-Valued Symbol Extraction on PUF Randomness",
31st IEEE International Conference on Electronics, Circuits and Systems (ICECS),
Jan.
2025.
| DOI: | 10.1109/ICECS61496.2024.10849251 |
2024
105.
B. Driemeyer,
H. Mandry,
D. -. Wiens,
J. Becker and
M. Ortmanns,
"Optimisation of RO-PUF Design Parameters for Minimising the Effective Area per PUF Bit",
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore,
May
2024.
| DOI: | 10.1109/ISCAS58744.2024.10558478 |
2023
104.
M. Sporer,
N. Graber,
S. Reich,
C. Gueli,
J. Becker,
T. Stieglitz and
M. Ortmanns,
"NeuroBus – Architecture and Communication Bus for an Ultra-Flexible Neural Interface",
IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA,
May
2023.
| DOI: | 10.1109/ISCAS46773.2023.10181816 |
2022
103.
M. A. Mokhtar,
A. Abdelaal,
M. Sporer,
J. Becker,
J. G. Kauffman and
M. Ortmanns,
"A 0.9-V DAC-Calibration-Free Continuous-Time Incremental Delta-Sigma Modulator Achieving 97-dB SFDR at 2 MS/s in 28-nm CMOS",
IEEE Journal of Solid-State Circuits, Volume: 57, Issue: 11,
Nov.
2022.
| DOI: | 10.1109/JSSC.2022.3160325 |
102.
M. Sporer,
S. Reich,
H. Mandry,
J. Becker and
M. Ortmanns,
"A Wireless Headstage Prototype Based on a Neurorecorder IC",
IEEE Biomedical Circuits and Systems Conference (BioCAS), Taipei, Taiwan,
Oct.
2022.
| DOI: | 10.1109/BioCAS54905.2022.9948554 |
101.
B. Driemeyer,
H. Mandry,
D. -. Wiens,
J. Becker and
M. Ortmanns,
"PUF-Entropy Extraction of DAC Intersymbol-Interference using Continuous-Time Delta-Sigma ADCs",
IEEE International Conference on Electronics, Circuits and Systems (ICECS),
Oct.
2022.
| DOI: | 10.1109/ICECS202256217.2022.9971072 |
100.
S. Reich,
M. Sporer,
J. Becker,
S. B. Rieger,
M. Schüttler and
M. Ortmanns,
"A 32-ch Neuromodulator with redundant Voltage Monitors avoiding Blocking Capacitors",
IEEE ESSDERC/ESSCIRC 2022, Milan, Italy,
Sep.
2022.
2021
99.
S. Reich,
M. Sporer,
M. Haas,
J. Becker,
M. Schüttler and
M. Ortmanns,
"A High-Voltage Compliance, 32-Channel Digitally Interfaced Neuromodulation System on Chip",
IEEE Journal of Solid-State Circuits, vol. 56, issue 8, pp. 2476-2487,
Aug.
2021.
| DOI: | 10.1109/JSSC.2021.3076510 |
98.
H. Mandry,
S. Müelich,
J. Becker,
R. Fischer and
M. Ortmanns,
"Using Polynomial Interpolation for Reproducing Multi-Valued Responses of Physical Unclonable Functions on FPGAs",
IEEE International Symposium on Circuits and Systems (ISCAS),
May
2021.
| DOI: | 10.1109/ISCAS51556.2021.9401501 |
97.
M. A. Mokhtar,
A. Abdelaal,
M. Sporer,
J. Becker,
J. G. Kauffman and
M. Ortmanns,
"A 0.9-V Calibration-Free 97dB-SFDR 2-MS/s ContinuousTime Incremental Delta-Sigma ADC Utilizing Variable Bit-Width Quantizer in 28nm CMOS",
IEEE Custom Integrated Circuits Conference (CICC), Texas, USA (Virtual),
Apr.
2021.
96.
M. Rajabzadeh,
J. Ungethüm,
A. Herkle,
C. Schilpp,
J. Becker,
M. Fauler,
O. Wittekindt,
M. Frick and
M. Ortmanns,
"A PCB Based 24-Ch. MEA-EIS Allowing Fast Measurement of TEER",
IEEE Sensor Journal,
Mar.
2021.
| DOI: | 10.1109/JSEN.2021.3067823 |
2020
95.
A. Herkle,
P. Rossak,
H. Mandry,
J. Becker and
M. Ortmanns,
"Comparison of measurement and readout strategies for RO-PUFs on Xilinx Zynq-7000 SoC FPGAs",
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain,
Oct.
2020.
94.
A. Herkle,
H. Mandry,
J. Becker,
S. Reich,
M. Sporer and
M. Ortmanns,
"Extracting Weak PUFs from Differential Nonlinearity of Digital-to-Analog Converters",
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain,
Oct.
2020.
93.
A. Herkle,
H. Mandry,
J. Becker and
M. Ortmanns,
"Live Demonstration: Generating FPGA Fingerprints utilizing Full-Chip Characterization with Ring-Oscillator PUFs",
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain,
Oct.
2020.
92.
M. Rajabzadeh,
M. Häberle,
J. Becker and
M. Ortmanns,
"Comparison Study of DAC Realizations in Current Input CTΣΔ Modulators",
IEEE Transactions on Circuits and Systems II: Express Briefs,
Jul.
2020.
| DOI: | 10.1109/TCSII.2020.3007964 |
91.
H. Mandry,
A. Herkle,
S. Müelich,
J. Becker,
R. Fischer and
M. Ortmanns,
"Normalization and Multi-Valued Symbol Extraction from RO-PUFs for Enhanced Uniform Probability Distributions",
IEEE Transactions on Circuits and Systems--II: Express Briefs,
Mar.
2020.
| DOI: | 10.1109/TCSII.2020.2980748 |
2019
90.
A. Herkle,
H. Mandry,
J. Becker and
M. Ortmanns,
"In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs",
IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Tysons Corner, USA,
May
2019.
| DOI: | 10.18725/OPARU-14107 |
89.
H. Mandry,
A. Herkle,
L. Kürzinger,
S. Müelich,
J. Becker,
R. Fischer and
M. Ortmanns,
"Modular PUF Coding Chain with High-Speed Reed-Muller Decoder",
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan,
May
2019.
2018
88.
L. Lv,
A. Jain,
X. Zhou,
J. Becker,
Q. Li and
M. Ortmanns,
"A 0.4-V Gm–C Proportional-Integrator-Based Continuous-Time Delta-Sigma Modulator With 50-kHz BW and 74.4-dB SNDR",
IEEE Journal of Solid-State Circuits, vol. 53, no. 11, pp. 3256-3267,
Nov.
2018.
87.
A. Herkle,
J. Becker and
M. Ortmanns,
"Methoden zur Verbesserung von CMOS integrierten Arbiter-PUFs",
16. GMM/ITG-Fachtagung Analog, München, Germany,
Sep.
2018.
| DOI: | 10.18725/OPARU-17977 |
86.
A. Herkle,
J. Becker and
M. Ortmanns,
"An Arbiter PUF employing eye-opening oscillation for improved noise suppression",
IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy,
May
2018.
| DOI: | 10.18725/OPARU-17954 |
Patents
- A. Herkle, J. Becker, M. Ortmanns
[DE] Verfahren und Vorrichtung zur Erzeugung einer digitalen Signatur
DE102016204055A1, Patent record available from the German Patent
2016