Papers
2004
28.
Ortmanns,
M.;
Peters,
C.;
Manoli,
Y.;
Schmelzeisen,
R.;
Gutwald,
R.
A Novel Method for in-vivo Stress Measurement in Osteosynthesis
Biomedizinische Technik BMT, Ilmenau, Germany
2004
A Novel Method for in-vivo Stress Measurement in Osteosynthesis
Biomedizinische Technik BMT, Ilmenau, Germany
2004
27.
Ortmanns,
M.;
Peters,
C.;
Manoli,
Y.;
Schmelzeisen,
R.;
Gutwald,
R.
A Pressure Sensor based in-vivo Stress Measurement in Osteosynthesis
Eurosensors XVIII, Rom, Italy
2004
A Pressure Sensor based in-vivo Stress Measurement in Osteosynthesis
Eurosensors XVIII, Rom, Italy
2004
26.
Gerfers,
F.;
Ortmanns,
M.;
Manoli,
Y.
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT sigma-delta modulators
IEEE Symposium on Circuits and Systems, Vancouver, Canada
2004
Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT sigma-delta modulators
IEEE Symposium on Circuits and Systems, Vancouver, Canada
2004
25.
Becker,
M.;
Lotze,
N.;
Becker,
J.;
Ortmanns,
M.;
Manoli,
Y.
Implementation of a Power Optimized Decimator for Cascaded Sigma-Delta A/D Converters
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland
2004
Implementation of a Power Optimized Decimator for Cascaded Sigma-Delta A/D Converters
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland
2004
24.
Becker,
M.;
Lotze,
N.;
Becker,
J.;
Ortmanns,
M.;
Manoli,
Y.
Implementierung eines verlustleistungsoptimierten Dezimators für kaskadierte Sigma-Delta Analog-Digital Umsetzer
Advances in Radio Science Vol. 3 (Kleinheubacher Berichte 2004), pp. 389-393, Miltenberg, Germany
2004
Implementierung eines verlustleistungsoptimierten Dezimators für kaskadierte Sigma-Delta Analog-Digital Umsetzer
Advances in Radio Science Vol. 3 (Kleinheubacher Berichte 2004), pp. 389-393, Miltenberg, Germany
2004
23.
Keller,
M.;
Ortmanns,
M.;
Manoli,
Y.
On the Implicit Anti-Aliasing Filter in Continuous Time Sigma Delta Modulators
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland
2004
On the Implicit Anti-Aliasing Filter in Continuous Time Sigma Delta Modulators
IEEE International Conference on Signals and Electronic Systems (ICSES), Poznan, Poland
2004
2003
22.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
A Continuous-Time Sigma-Delta Modulator with Switched Capacitor Controlled Current Mode Feedback
European Solid-State Circuits Conference, Estoril, Portugal
2003
A Continuous-Time Sigma-Delta Modulator with Switched Capacitor Controlled Current Mode Feedback
European Solid-State Circuits Conference, Estoril, Portugal
2003
21.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Compensation of Finite Gain-Bandwidth Induced Errors in Continuous-Time Sigma-Delta Modulators
IEEE Int. Conf. on Electronics, Circuits and Systems, Sharjah, UAE
2003
Compensation of Finite Gain-Bandwidth Induced Errors in Continuous-Time Sigma-Delta Modulators
IEEE Int. Conf. on Electronics, Circuits and Systems, Sharjah, UAE
2003
20.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Ein zeitkontinuierlicher Sigma-Delta Modulator mit Stromquellen-Rückkopplung und reduzierter Clock-Jitter Empfindlichkeit
ITG/ GMM -Diskussionssitzung ANALOG03, Heilbronn, Germany
2003
Ein zeitkontinuierlicher Sigma-Delta Modulator mit Stromquellen-Rückkopplung und reduzierter Clock-Jitter Empfindlichkeit
ITG/ GMM -Diskussionssitzung ANALOG03, Heilbronn, Germany
2003
19.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Fundamental Limits of Jitter Insensitivity in discrete and Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Bangkok, Thailand
2003
Fundamental Limits of Jitter Insensitivity in discrete and Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Bangkok, Thailand
2003
18.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Influence of finite Integrator Gain Bandwidth on Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Bangkok, Thailand
2003
Influence of finite Integrator Gain Bandwidth on Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Bangkok, Thailand
2003
17.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
The implementation of a continuous-time sigma-delta modulator with reduced sensitivity to clock jitter
GMM/GI/ITG Fachtagung - Entwurf Integrierter Schaltungen und Systeme, E.I.S.-Workshop, Erlangen, Germany
2003
The implementation of a continuous-time sigma-delta modulator with reduced sensitivity to clock jitter
GMM/GI/ITG Fachtagung - Entwurf Integrierter Schaltungen und Systeme, E.I.S.-Workshop, Erlangen, Germany
2003
16.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
The implementation of a continuous-time sigma-delta modulator with reduced sensitivity to clock jitter
GMM/GI/ITG Fachtagung - Entwurf Integrierter Schaltungen und Systeme, E.I.S.-Workshop, Erlangen, Germany
2003
The implementation of a continuous-time sigma-delta modulator with reduced sensitivity to clock jitter
GMM/GI/ITG Fachtagung - Entwurf Integrierter Schaltungen und Systeme, E.I.S.-Workshop, Erlangen, Germany
2003
15.
Gerfers,
F.;
Ortmanns,
M.;
Manoli,
Y.
A 1.5-V, 12-bit Power-Efficient Continuous-Time Third-Order Sigma-Delta Modulator
IEEE Journal of Solid State Circuits, Vol.38, No.8, pp. 1343-1352
2003
A 1.5-V, 12-bit Power-Efficient Continuous-Time Third-Order Sigma-Delta Modulator
IEEE Journal of Solid State Circuits, Vol.38, No.8, pp. 1343-1352
2003
14.
Gerfers,
F.;
Ortmanns,
M.;
Manoli,
Y.
A 1V, 12-Bit Wideband Continuous-Time Sigma-Delta Modulator for UMTS Applications
IEEE Symposium on Circuits and Systems, Bangkok, Thailand
2003
A 1V, 12-Bit Wideband Continuous-Time Sigma-Delta Modulator for UMTS Applications
IEEE Symposium on Circuits and Systems, Bangkok, Thailand
2003
13.
Becker,
M.;
Heiber,
K.;
Ortmanns,
M.;
Manoli,
Y.
A Power Optimized Decimator Architecture for Cascaded Sigma-Delta Analog-to-Digital Converters
International Conference on Electronics, Circuits and Systems, Sharjah, UAE
2003
A Power Optimized Decimator Architecture for Cascaded Sigma-Delta Analog-to-Digital Converters
International Conference on Electronics, Circuits and Systems, Sharjah, UAE
2003
2002
12.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
A Continuous-Time Sigma-Delta Modulator with Reduced Jitter Sensitivity
European Solid-State Circuits Conference, Florence, Italy
2002
A Continuous-Time Sigma-Delta Modulator with Reduced Jitter Sensitivity
European Solid-State Circuits Conference, Florence, Italy
2002
11.
Ortmanns,
M.;
Gerfers,
F.;
Samid,
L.;
Manoli,
Y.
Multirate Cascaded Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Phoenix, USA
2002
Multirate Cascaded Continuous-Time Sigma-Delta Modulators
IEEE Int. Symp. on Circuits and Systems, Phoenix, USA
2002
10.
Gerfers,
F.;
Hack,
C.;
Ortmanns,
M.;
Manoli,
Y.
A 1.2V, 200µW Rail-to-Rail OpAmp with 90dB THD using Replica Gain Enhancement
European Solid-State Circuits Conference, Florence, Italy
2002
A 1.2V, 200µW Rail-to-Rail OpAmp with 90dB THD using Replica Gain Enhancement
European Solid-State Circuits Conference, Florence, Italy
2002
9.
Samid,
L.;
Gerfers,
F.;
Ortmanns,
M.;
Manoli,
Y.
A new kind of low power multibit third order CT-lowpass modulator
IEEE Symposium on Circuits and Systems, Phoenix, USA
2002
A new kind of low power multibit third order CT-lowpass modulator
IEEE Symposium on Circuits and Systems, Phoenix, USA
2002
8.
Gerfers,
F.;
Soh,
K. M.;
Ortmanns,
M.;
Manoli,
Y.
Figure of Merit based Design Strategy for Low-Power Continuous-Time Sigma-Delta Modulators
IEEE Symposium on Circuits and Systems, Phoenix, USA
2002
Figure of Merit based Design Strategy for Low-Power Continuous-Time Sigma-Delta Modulators
IEEE Symposium on Circuits and Systems, Phoenix, USA
2002
7.
Gerfers,
F.;
Ortmanns,
M.;
Samid,
L.;
Manoli,
Y.
Implementation of a 1.5V Low-Power Clock-Jitter Insensitive Continuous-Time Sigma-Delta Modulator
IEEE Symposium on Circuits and Systems, Phoenix, USA
2002
Implementation of a 1.5V Low-Power Clock-Jitter Insensitive Continuous-Time Sigma-Delta Modulator
IEEE Symposium on Circuits and Systems, Phoenix, USA
2002
2001
6.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Clock Jitter Insensitive Continous-Time Sigma-Delta Modulators
Int. Conf. on Electronics, Circuits and Systems, Sydney, Australia
2001
Clock Jitter Insensitive Continous-Time Sigma-Delta Modulators
Int. Conf. on Electronics, Circuits and Systems, Sydney, Australia
2001
5.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
On the Synthesis of Cascaded Continuous Time Sigma-Delta Modulators
V419-V422, IEEE Int. Symp. on Circuits and Systems, Sydney, Australia
2001
On the Synthesis of Cascaded Continuous Time Sigma-Delta Modulators
V419-V422, IEEE Int. Symp. on Circuits and Systems, Sydney, Australia
2001
4.
Ortmanns,
M.;
Gerfers,
F.;
Samid,
L.;
Manoli,
Y.
Successful Design of Cascaded Continous-Time Sigma-Delta Modulators
Int. Conf. on Electronics, Circuits and Systems, Malta
2001
Successful Design of Cascaded Continous-Time Sigma-Delta Modulators
Int. Conf. on Electronics, Circuits and Systems, Malta
2001
Books
2025
10.
Buhmann,
A.;
Lanniel,
A.;
Hiller,
T.;
Sporer,
M.;
Reich,
S.;
Ortmanns,
M.
Interface Circuits
Publisher: Ed. Elsevier
in Comprehensive Microsystems, 2nd ed., Y. B. Gianchandani, Volume 1, 2025, pp. 452–479 Edition
2025
Interface Circuits
Publisher: Ed. Elsevier
in Comprehensive Microsystems, 2nd ed., Y. B. Gianchandani, Volume 1, 2025, pp. 452–479 Edition
2025
| DOI: | 10.1016/B978-0-323-95478-5.00040-6 |
2023
9.
Chan,
C.-H.;
Zhu,
Y.;
Qi,
L.;
Sin,
S.-W.;
Ortmanns,
M.;
Martins,
R. P.
High-Performance Oversampling ADCs
Paulo da Silva Martins, R., Mak, PI. (eds) Analog and Mixed-Signal Circuits in Nanoscale CMOS. Analog Circuits and Signal Processing. Springer, Cham. Edition
January 2023
High-Performance Oversampling ADCs
Paulo da Silva Martins, R., Mak, PI. (eds) Analog and Mixed-Signal Circuits in Nanoscale CMOS. Analog Circuits and Signal Processing. Springer, Cham. Edition
January 2023
| DOI: | doi.org/10.1007/978-3-031-22231-3_5 |
2021
8.
Haas,
M.;
Ortmanns,
M.
Neural Stimulation Circuits
Publisher: River Publishers
Selected Topics in Biomedical Circuits and Systems, Eds Minkyu Je and Myung Hoon Sunwoo Edition
February 2021
Neural Stimulation Circuits
Publisher: River Publishers
Selected Topics in Biomedical Circuits and Systems, Eds Minkyu Je and Myung Hoon Sunwoo Edition
February 2021
| ISBN: | 9788770221481 |
2019
7.
Vogelmann,
P.;
Mokhtar,
M. A.;
Luo,
Y.;
Ortmanns,
M.
Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits: Advances in Analog Circuit Design 2019
Publisher: Springer
2019
Next-Generation ADCs, High-Performance Power Management, and Technology Considerations for Advanced Integrated Circuits: Advances in Analog Circuit Design 2019
Publisher: Springer
2019
| ISBN: | 978-3030252663 |
2016
6.
Ortmanns,
M.;
Ritter,
R.;
Chi,
J.
ΣΔ ADCs with Improved Interferer Robustness
Volume Wideband Continuous-time SD-ADCs, Automotive Electronics, and Power Management: Advances in Analog Circuit Design 2016
Publisher: Springer
2016
ΣΔ ADCs with Improved Interferer Robustness
Volume Wideband Continuous-time SD-ADCs, Automotive Electronics, and Power Management: Advances in Analog Circuit Design 2016
Publisher: Springer
2016
| ISBN: | 978-3319416694 |
2014
5.
Brückner,
T.;
Ortmanns,
M.
Automated Design of High-Speed Continuous-Time Sigma-Delta Modulators employing Compensation and Correction of Non-Idealities, in High-Performance AD and DA Converters, IC Design in Scaled Technologies, and Time-Domain Signal Processing
Publisher: Springer
2014
Automated Design of High-Speed Continuous-Time Sigma-Delta Modulators employing Compensation and Correction of Non-Idealities, in High-Performance AD and DA Converters, IC Design in Scaled Technologies, and Time-Domain Signal Processing
Publisher: Springer
2014
2007
4.
Ortmanns,
M.;
Buhmann,
A.;
Manoli,
Y.
Interface Circuits in Comprehensive Microsystems
Publisher: Elsevier Pubs.
2007
Interface Circuits in Comprehensive Microsystems
Publisher: Elsevier Pubs.
2007
2006
3.
Buhmann,
A.;
Keller,
M.;
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Time-Continuous Delta-Sigma A/D Converters - From Theory to Practical Implementation
Publisher: in Advanced Signal Processing, Circuits, and Systems Design Techniques for Communications, (eds. Paliouras, V.; Stouraitis, Th.; Ioinovici, A.)
2006
Time-Continuous Delta-Sigma A/D Converters - From Theory to Practical Implementation
Publisher: in Advanced Signal Processing, Circuits, and Systems Design Techniques for Communications, (eds. Paliouras, V.; Stouraitis, Th.; Ioinovici, A.)
2006
2005
2.
Ortmanns,
M.;
Gerfers,
F.
Continuous-Time Sigma-Delta A/D Conversion, Fundamentals, Error Correction and Robust Implementations
Publisher: Springer Pubs.
2005
Continuous-Time Sigma-Delta A/D Conversion, Fundamentals, Error Correction and Robust Implementations
Publisher: Springer Pubs.
2005
2003
1.
Ortmanns,
M.
Error Compensation in Continuous-Time Sigma-Delta A/D Converters
Publisher: PhD Thesis, Albert-Ludwigs-University Freiburg
2003
Error Compensation in Continuous-Time Sigma-Delta A/D Converters
Publisher: PhD Thesis, Albert-Ludwigs-University Freiburg
2003
Patents
- A. Herkle, J. Becker, M. Ortmanns
[DE] Verfahren und Vorrichtung zur Erzeugung einer digitalen Signatur
DE102016204055A1, Patent record available from the German Patent
2016 - R. Ritter, M. Schimper, W. Schelmbauer, M. Ortmanns
Analog-to-digital converter, signal processor, and method for analog-to-digital conversion.
US8760330, Patent record available from the US Patent Office
2014 - A. Rocke, M. Ortmanns und N. Unger
Device for controlling the electric charge on stimulation electrodes.
EP1827591, Patent record available from the European Patent
2007 - M. Ortmanns, Y. Manoli und F. Gerfers
Controlled power source, in particular for a digital/analogue converter in continuous time sigma/delta modulators.
EP1550222, Patent record available from the European Patent
2005 - A. Rocke, M. Ortmanns und N. Unger
Device for controlling the electric charge on stimulation electrodes.
WO06063743, Patent record available from the World Intellectual Property Organization (WIPO)
2006 - M. Ortmanns und Y. Manoli
Method for the characterisation of and for the automatic correction of linear errors in analog/digital converters.
WO05078936, Patent record available from the World Intellectual Property Organization (WIPO)
2005 - M. Ortmanns, Y. Manoli und F. Gerfers
Controlled power source, in particular for a digital/analogue converter in continuous time sigma/delta modulators.
WO04034588, Patent record available from the World Intellectual Property Organization (WIPO)
2004 - M. Ortmanns, Y. Manoli und F. Gerfers
Controlled current source, in particular for digital/analogue converters in continuous-time sigma/delta modulators.
US7151474, Patent record available from the US Patent Office
2006 - M. Ortmanns, Y. Manoli und F. Gerfers
Controlled power source, in particular for a digital/analogue converter in continuous time sigma delta modulators.
US20060055580, Patent record available from the US Patent Office
2006