M.Sc. Michael Pietzko

I studied electrical engineering at Saarland University, where I received my B.Sc. degree in October 2016. I continued my studies at the University of Ulm, where I received my M.Sc. degree in January 2020. From October 2018 to March 2019, I worked as an intern in the ASIC Design group at the Robert Bosch Research and Technology Center (Sunnyvale, CA). The topic of my Master thesis was ''Highly Linear Gm-C based Sigma Delta Modulator''.

In February 2020 I started working towards my Ph.D. degree at the Institute of Microelectronics at the University of Ulm under the supervision of Prof. Dr.-Ing. Maurits Ortmanns. My current research interest is in the field of ultra-low power continuous-time Sigma-Delta analog-to-digital converters.

Projects

Ultra-low Power, Wide Bandwidth Continuous-time Delta Sigma Analog to Digital Converter Design

A. Abdelaal, M. Pietzko: Continuous-time delta sigma modulators (CTDSMs) have recently become the key device for broadband wireless and wireline communication.  Due to their built in anti-aliasing filter and the ability to have relaxed sampling requirements the CTDS modulators are preferred over their discrete time counterparts ... [more]

Student theses

[rp] = Bachelor theses, [mt] = Master theses

Aktuelle Arbeiten

  • Mohamed Mahmoud
    Investigation of Time-Interleaving in Noise-Shaped SAR ADCs [mt]

Abgeschlossene Arbeiten

  • Julian Spiess
    Power Efficient Delta-Sigma Modulator with Bitwise ELD Compensation [mt]

Publications

2022

4.
Pietzko, M.; Ungethüm, J.; Kauffman, J. G.; Li, Q.; Ortmanns, M.
Bitwise ELD Compensation in ∆Σ Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Austin, USA
May 2022
DOI:10.1109/ISCAS48785.2022.9937305

2021

3.
Ezekwe, C.; Ganta, S.; Xing, X.; Grad, A.; Mayer, T.; Visconti, A.; Diazzi, F.; Chen, M.; Morton, D.; Valli, L.; Wolf, R.; Eghtesadi, A.; Wolfer, T.; Pietzko, M.; Grathwohl, A.; Northemann, T.; Schoenleber, R.; Khalilyulin, R.; Mukhopadhyay, I.; Negut, A.; Kosov, A.; Serafin, A.; Hayek, J.; Sun, L.
A direct-digitization open-loop gyroscope frontend with +/-8000°/s full-scale range and noise floor of 0.0047°/s/√Hz
Symposium on VLSI Circuits, 2021, pp. 1-2
June 2021
DOI:10.23919/VLSICircuits52068.2021.9492404
2.
Abdelaal, A.; Pietzko, M.; Mokhtar, M. A.; Kauffman, J. G.; Ortmanns, M.
FIR filter with Symmetric Non-Equal Coefficients for CT Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea (Online)
May 2021
1.
Pietzko, M.; Wagner, J.; Abdelaal, A.; Kauffman, J. G.; Ortmanns, M.
Influence of Excess Loop Delay on the STF of Continuous-Time Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea (Online)
May 2021

Wissenschaftl. Mitarbeiter

Michael Pietzko