Prof. Dr.-Ing. Michael Glaß
Deputy Director
Research
- Design automation of embedded systems
- Reliability analysis and optimization
- Real-time analysis
- Meta-heuristic optimization
- Automotive systems
Teaching
Winter semester:
- Lecture Grundlagen der Rechnerarchitektur
- Lecture Verification of Digital Systems
- Seminar Reliability Analysis in Embedded Systems
Summer semester:
- Lecture Dependable Embedded Systems
- Lecture Specification of Embedded Systems
- Seminar Design Space Exploration in Embedded Systems
Projects:
Position
Deputy Director
Contact
Room O27/318
Institute of Embedded Systems/Real-Time Systems
Faculty of Engineering, Computer Science and Psychology
Ulm University
Albert-Einstein-Allee 11, 89081 Ulm, Germany
Phone: +497315024181 (Office)
Fax: +497315024182
michael.glass(at)uni-ulm.de
PGP-/GPG-Key
Office hours
Tuesday, 3:00-4:00 PM
Please contact Ms. Porada to make an appointment
Publikationen
2020
125.
Richthammer,
Valentina;
Scheinert,
Tobias;
Glaß,
Michael
Data Mining in System-Level Design Space Exploration of Embedded Systems
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XX),
July 2020
Data Mining in System-Level Design Space Exploration of Embedded Systems
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XX),
July 2020
124.
Richthammer,
Valentina;
Glaß,
Michael
Complexity Reduction for Embedded System-Level Design
PhD forum, Design, Automation and Test in Europe (DATE),
March 2020
Complexity Reduction for Embedded System-Level Design
PhD forum, Design, Automation and Test in Europe (DATE),
March 2020
123.
Richthammer,
Valentina;
Rieß,
Marcel;
Bestler,
Julian;
Slomka,
Frank;
Glaß,
Michael
Design Space Exploration for Model-based Communication Systems
Proceedings of Design, Automation and Test in Europe (DATE),
March 2020
Design Space Exploration for Model-based Communication Systems
Proceedings of Design, Automation and Test in Europe (DATE),
March 2020
122.
Richthammer,
Valentina;
Fassnacht,
Fabian;
Glaß,
Michael
Search-space Decomposition for System-level Design Space Exploration of Embedded Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES),
January 2020
Search-space Decomposition for System-level Design Space Exploration of Embedded Systems
ACM Transactions on Design Automation of Electronic Systems (TODAES),
January 2020
| DOI: | 10.1145/3369388 |
2019
121.
Richthammer,
Valentina;
Glaß,
Michael
Efficient Search-Space Encoding for System-Level Design Space Exploration of Embedded Systems
IEEE 13th Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC 2019),
October 2019
Efficient Search-Space Encoding for System-Level Design Space Exploration of Embedded Systems
IEEE 13th Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC 2019),
October 2019
| DOI: | 10.1109/MCSoC.2019.00046 |
120.
Smirnov,
Fedor;
Reimann,
Felix;
Teich,
Jürgen;
Glaß,
Michael
Automatic Optimization of the VLAN Partitioning in Automotive Communication Networks
ACM Transactions on Design Automation of Electronic Systems (TODAES), 24 (1) :9:1 - 23
January 2019
Automatic Optimization of the VLAN Partitioning in Automotive Communication Networks
ACM Transactions on Design Automation of Electronic Systems (TODAES), 24 (1) :9:1 - 23
January 2019
| DOI: | 10.1145/3278120 |
119.
Pourmohseni,
Behnaz;
Wildermann,
Stefan;
Glaß,
Michael;
Teich,
Jürgen
Hard real-time application mapping reconfiguration for NoC-based many-core systems
Real-Time Systems
2019
Hard real-time application mapping reconfiguration for NoC-based many-core systems
Real-Time Systems
2019
| DOI: | 10.1007/s11241-019-09326-y |
2018
118.
Weichslgartner,
Andreas;
Wildermann,
Stefan;
Gangadharan,
Deepak;
Glaß,
Michael;
Teich,
Jürgen
A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs
ACM Transactions on Embedded Computing Systems (TECS), 17 (5) :89:1-25
November 2018
A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs
ACM Transactions on Embedded Computing Systems (TECS), 17 (5) :89:1-25
November 2018
| DOI: | 10.1145/3274665 |
117.
Schwarzer,
Tobias;
Roloff,
Sascha;
Richthammer,
Valentina;
Khaldi,
Rami;
Wildermann,
Stefan;
Glaß,
Michael;
Teich,
Jürgen
On the Complexity of Mapping Feasibility in Many-Core Architectures
International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC),
November 2018
On the Complexity of Mapping Feasibility in Many-Core Architectures
International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC),
November 2018
| DOI: | 10.1109/MCSoC2018.2018.00038 |
116.
Richthammer,
Valentina;
Schwarzer,
Tobias;
Wildermann,
Stefan;
Teich,
Jürgen;
Glaß,
Michael
Architecture Decomposition in System Synthesis of Heterogeneous Many-Core Systems
Proceedings of the 55th Annual Design Automation Conference (DAC),
June 2018
Architecture Decomposition in System Synthesis of Heterogeneous Many-Core Systems
Proceedings of the 55th Annual Design Automation Conference (DAC),
June 2018
| DOI: | 10.1145/3195970.3195995 |
115.
Smirnov,
Fedor;
Reimann,
Felix;
Teich,
Jürgen;
Han,
Zhao;
Glaß,
Michael
Automatic Optimization of Redundant Message Routings in Automotive Networks
Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems, Page 90 - 99
21st International Workshop on Software and Compilers for Embedded Systems (SCOPES)
Sankt Goar, Germany
May 2018
Automatic Optimization of Redundant Message Routings in Automotive Networks
Proceedings of the 21st International Workshop on Software and Compilers for Embedded Systems, Page 90 - 99
21st International Workshop on Software and Compilers for Embedded Systems (SCOPES)
Sankt Goar, Germany
May 2018
| DOI: | 10.1145/3207719.3207725 |
114.
Richthammer,
Valentina;
Glaß,
Michael
On Search-Space Restriction for Design Space Exploration of Multi-/Many-Core Systems
Proceedings of 21. Workshop „Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (MBMV 2018),
March 2018
On Search-Space Restriction for Design Space Exploration of Multi-/Many-Core Systems
Proceedings of 21. Workshop „Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (MBMV 2018),
March 2018
| DOI: | 10.15496/publikation-25675 |
113.
Khosravi,
Faramarz;
Müller,
Malte;
Glaß,
Michael;
Teich,
Jürgen
Simulation-based uncertainty correlation modeling in reliability analysis
Proceedings of the Institution of Mechanical Engineers, Part O: Journal of Risk and Reliability, 232 (6) :725 – 737
March 2018
Simulation-based uncertainty correlation modeling in reliability analysis
Proceedings of the Institution of Mechanical Engineers, Part O: Journal of Risk and Reliability, 232 (6) :725 – 737
March 2018
| DOI: | 10.1177/1748006X18758720 |
112.
Schwarzer,
Tobias;
Weichslgartner,
Andreas;
Glaß,
Michael;
Wildermann,
Stefan;
Brand,
Peter;
Teich,
Jürgen
Symmetry-eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 37 (2) :297 - 310
February 2018
Symmetry-eliminating Design Space Exploration for Hybrid Application Mapping on Many-Core Architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 37 (2) :297 - 310
February 2018
| DOI: | 10.1109/TCAD.2017.2695894 |
111.
Weichslgartner,
Andreas;
Wildermann,
Stefan;
Glaß,
Michael;
Teich,
Jürgen
Invasive Computing for Mapping Parallel Programs to Many-Core Architectures
from Computer Architecture and Design Methodologies
Publisher: Springer Singapore
January 2018
Invasive Computing for Mapping Parallel Programs to Many-Core Architectures
from Computer Architecture and Design Methodologies
Publisher: Springer Singapore
January 2018
| DOI: | 10.1007/978-981-10-7356-4 |
| ISBN: | 978-981-10-7355-7 |
2017
110.
Pourmohseni,
Behnaz;
Wildermann,
Stefan;
Glaß,
Michael;
Teich,
Jürgen
Predictable Run-Time Mapping Reconfiguration for Real-Time Applications on Many-Core Systems
Proceedings of Real-Time Networks and Systems (RTNS), Page 148 - 157
Real-Time Networks and Systems (RTNS)
Grenoble, France
October 2017
Predictable Run-Time Mapping Reconfiguration for Real-Time Applications on Many-Core Systems
Proceedings of Real-Time Networks and Systems (RTNS), Page 148 - 157
Real-Time Networks and Systems (RTNS)
Grenoble, France
October 2017
| DOI: | 10.1145/3139258.3139278 |
109.
Smirnov,
Fedor;
Glaß,
Michael;
Reimann,
Felix;
Teich,
Jürgen
Optimizing Message Routing and Scheduling in Automotive Mixed-Criticality Time-Triggered Networks
Proceedings of the 54nd ACM/EDAC/IEEE Design Automation Conference (DAC), Page 6
54nd ACM/EDAC/IEEE Design Automation Conference (DAC)
Austin, TX, U.S.A.
June 2017
Optimizing Message Routing and Scheduling in Automotive Mixed-Criticality Time-Triggered Networks
Proceedings of the 54nd ACM/EDAC/IEEE Design Automation Conference (DAC), Page 6
54nd ACM/EDAC/IEEE Design Automation Conference (DAC)
Austin, TX, U.S.A.
June 2017
| DOI: | 10.1145/3061639.3062298 |
108.
Khosravi,
Faramarz;
Glaß,
Michael;
Teich,
Jürgen
Automatic Reliability Analysis in the Presence of Probabilistic Common Cause Failures
IEEE Transactions on Reliability, 66 (2) :319 - 338
June 2017
Automatic Reliability Analysis in the Presence of Probabilistic Common Cause Failures
IEEE Transactions on Reliability, 66 (2) :319 - 338
June 2017
| DOI: | 10.1109/TR.2016.2638320 |
107.
Glaß,
Michael;
Teich,
Jürgen;
Lukasiewycz,
Martin;
Reimann,
Felix
Handbook of Hardware/Software Codesign
In Soonhoi Ha and Jürgen Teich, Editor
Chapter Hybrid Optimization Techniques for System-Level Design Space Exploration, Page 31
Publisher: Springer Netherlands
April 2017
31
Handbook of Hardware/Software Codesign
In Soonhoi Ha and Jürgen Teich, Editor
Chapter Hybrid Optimization Techniques for System-Level Design Space Exploration, Page 31
Publisher: Springer Netherlands
April 2017
31
| DOI: | 10.1007/978-94-017-7358-4_8-1 |
106.
Ha,
Soonhoi;
Teich,
Jürgen;
Haubelt,
Christian;
Glaß,
Michael;
Mitra,
Tulika;
Dömer,
Rainer;
Eles,
Petru;
Shrivastana,
Aviral;
Gerstlauer,
Andreas;
Bhattacharyya,
Shuvra S.
Handbook of Hardware/Software Codesign
In Soonhoi Ha and Jürgen Teich, Editor
Chapter Introduction to Hardware/Software Codesign, Page 24
Publisher: Springer Netherlands
April 2017
24
Handbook of Hardware/Software Codesign
In Soonhoi Ha and Jürgen Teich, Editor
Chapter Introduction to Hardware/Software Codesign, Page 24
Publisher: Springer Netherlands
April 2017
24
| DOI: | 10.1007/978-94-017-7358-4_41-1 |
105.
Aliee,
Hananeh;
Borgonovo,
Emanuele;
Glaß,
Michael;
Teich,
Jürgen
On the Boolean extension of the Birnbaum importance to non-coherent systems
Reliability Engineering & System Safety, 160 :191 - 200
April 2017
On the Boolean extension of the Birnbaum importance to non-coherent systems
Reliability Engineering & System Safety, 160 :191 - 200
April 2017
| DOI: | 10.1016/j.ress.2016.12.013 |
104.
Smirnov,
Fedor;
Glaß,
Michael;
Reimann,
Felix;
Teich,
Jürgen
Formal Timing Analysis of Non-Scheduled Traffic in Automotive Scheduled TSN Networks
In Proceedings of Design, Automation and Test in Europe (DATE), Page 1643 - 1646
Design, Automation and Test in Europe (DATE)
Lausanne, Switzerland
March 2017
Formal Timing Analysis of Non-Scheduled Traffic in Automotive Scheduled TSN Networks
In Proceedings of Design, Automation and Test in Europe (DATE), Page 1643 - 1646
Design, Automation and Test in Europe (DATE)
Lausanne, Switzerland
March 2017
| DOI: | 10.23919/DATE.2017.7927256 |
103.
Pourmohseni,
Behnaz;
Glaß,
Michael;
Teich,
Jürgen
Automatic Operating Point Distillation for Hybrid Mapping Methodologies
In Proceedings of Design, Automation and Test in Europe (DATE), Page 1135 - 1140
Design, Automation and Test in Europe (DATE)
Lausanne, Switzerland
March 2017
Automatic Operating Point Distillation for Hybrid Mapping Methodologies
In Proceedings of Design, Automation and Test in Europe (DATE), Page 1135 - 1140
Design, Automation and Test in Europe (DATE)
Lausanne, Switzerland
March 2017
| DOI: | 10.23919/DATE.2017.7927160 |
102.
Li,
Zhenmin;
Park,
Heejong;
Malik,
Avinash;
Wang,
Kevin I-Kai;
Salcic,
Zoran;
Kuzmin,
Boris;
Glaß,
Michael;
Teich,
Jürgen
Using Design Space Exploration for Finding Schedules with Guaranteed Reaction Times of Synchronous Programs on Multi-core Architecture
Journal of Systems Architecture, 74 :30 - 45
March 2017
Using Design Space Exploration for Finding Schedules with Guaranteed Reaction Times of Synchronous Programs on Multi-core Architecture
Journal of Systems Architecture, 74 :30 - 45
March 2017
| DOI: | 10.1016/j.sysarc.2016.12.003 |
101.
Aliee,
Hananeh;
Banaiyianmofrad,
Abbas;
Glaß,
Michael;
Teich,
Jürgen;
Dutt,
Nikil
Redundancy-aware Design Space Exploration for Memory Reliability in Many-Cores
In Proceeding of Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMW), Page 1 - 12
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMW)
Bremen, Germany
February 2017
Redundancy-aware Design Space Exploration for Memory Reliability in Many-Cores
In Proceeding of Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMW), Page 1 - 12
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMW)
Bremen, Germany
February 2017