Publikationen (Gesamt)
2006
129.
Becker,
J.;
Manoli,
Y.
Computer-aided 3D animation of analog circuits
in Proc. 6th European Workshop on Microelectronics Education (EWME), Stockholm
2006
Computer-aided 3D animation of analog circuits
in Proc. 6th European Workshop on Microelectronics Education (EWME), Stockholm
2006
128.
Anders,
J.;
Mathis,
W.;
Ortmanns,
M.
Direkter Entwurf von zeitkontinuierlichen Sigma-Delta-Modulatoren - Optimale Rauschformung und erweiterte Stabilitätsbetrachtungen
Kleinheubacher Tagung
2006
Direkter Entwurf von zeitkontinuierlichen Sigma-Delta-Modulatoren - Optimale Rauschformung und erweiterte Stabilitätsbetrachtungen
Kleinheubacher Tagung
2006
127.
Becker,
J.;
Manoli,
Y.
Eine webbasierte Lernplattform mit interaktiver Simulation und 3D-Animation analoger Schaltungen
in Proc. 9. ITG/GMM-Fachtagung, pp. 261-264, Dresden, Germany
2006
Eine webbasierte Lernplattform mit interaktiver Simulation und 3D-Animation analoger Schaltungen
in Proc. 9. ITG/GMM-Fachtagung, pp. 261-264, Dresden, Germany
2006
126.
Liu,
L.;
Chartier,
S.;
Trasser,
A.;
Schumacher,
H.
Frequency Divider Using a Si/SiGe HBT Technology for 79 GHz Automotive Radar Applications
4th Joint Symp on Opto- and Microelectronic Devices and Circuits, Duisburg, Germany, September
2006
Frequency Divider Using a Si/SiGe HBT Technology for 79 GHz Automotive Radar Applications
4th Joint Symp on Opto- and Microelectronic Devices and Circuits, Duisburg, Germany, September
2006
125.
Becker,
M.;
Lotze,
N.;
Ortmanns,
M.;
Manoli,
Y.
Implementation and Analysis of Power Consumption for a Power Optimized Decimator Designed for Cascaded Sigma-Delta A/D Converters
IEEE International Midwest Symposium on Circuits and Systems, 2006. MWSCAS 2006, San Juan, Puerto Rico
2006
Implementation and Analysis of Power Consumption for a Power Optimized Decimator Designed for Cascaded Sigma-Delta A/D Converters
IEEE International Midwest Symposium on Circuits and Systems, 2006. MWSCAS 2006, San Juan, Puerto Rico
2006
124.
Schreier,
R.;
Rothermel,
A.
Latenzzeitoptimierte Videokompression
FKTG Jahrestagung, Potsdam
2006
Latenzzeitoptimierte Videokompression
FKTG Jahrestagung, Potsdam
2006
123.
Schreier,
R.;
Rothermel,
A.
Motion Adaptive Intra Refresh for Low-Delay Video Coding
Digest of Technical Papers IEEE International Conference on Consumer Electronics (ICCE), pp. 453-454
2006
Motion Adaptive Intra Refresh for Low-Delay Video Coding
Digest of Technical Papers IEEE International Conference on Consumer Electronics (ICCE), pp. 453-454
2006
122.
Schreier,
R.;
Rothermel,
A.
Motion adaptive intra refresh for the H.264 video coding standard
IEEE Transactions on Consumer Electronics, Vol. 52, No. 1, pp. 249-253
2006
Motion adaptive intra refresh for the H.264 video coding standard
IEEE Transactions on Consumer Electronics, Vol. 52, No. 1, pp. 249-253
2006
121.
Henrici,
F.;
Becker,
J.;
Manoli,
Y.
Simulation eines rekonfigurierbaren Gm-C Filter Arrays
Kleinheubacher Berichte - Advances in Radio Science, Miltenberg, Germany
2006
Simulation eines rekonfigurierbaren Gm-C Filter Arrays
Kleinheubacher Berichte - Advances in Radio Science, Miltenberg, Germany
2006
120.
Henrici,
F.;
Becker,
J.;
Manoli,
Y.
Simulation of a reconfigurable mixed-signal Field Programmable Analog Array
Technical talk at CDNLive! EMEA, Nice, France
2006
Simulation of a reconfigurable mixed-signal Field Programmable Analog Array
Technical talk at CDNLive! EMEA, Nice, France
2006
119.
Becker,
J.;
Manoli,
Y.
Synthesis of analog filters on a continuous-time FPAA using a genetic algorithm
in Proc. IEEE International Conference on Field Programmable Logic (FPL), Madrid
2006
Synthesis of analog filters on a continuous-time FPAA using a genetic algorithm
in Proc. IEEE International Conference on Field Programmable Logic (FPL), Madrid
2006
118.
Becker,
J.;
Manoli,
Y.
Visualisierung analoger Schaltungen durch 3D Animation von transienten SPICE-Simulationen
in Proc. Advances in Radio Science, Miltenberg, Germany
2006
Visualisierung analoger Schaltungen durch 3D Animation von transienten SPICE-Simulationen
in Proc. Advances in Radio Science, Miltenberg, Germany
2006
2005
117.
Zahabi,
A.;
Shoaei,
O.;
Koolivand,
Y.;
Jabehdar-maralani,
P.
A Low-Power Sigma-Delta Modulator with Low Capacitor Spread for Multi-Standard Receiver Applications
International Symp. on Circuits and Systems (ISCAS) , pp. 3231–3234, Kobe (Japan)
Mai 2005
A Low-Power Sigma-Delta Modulator with Low Capacitor Spread for Multi-Standard Receiver Applications
International Symp. on Circuits and Systems (ISCAS) , pp. 3231–3234, Kobe (Japan)
Mai 2005
116.
Koolivand,
Y.;
Shoaei,
O.;
Zahabi,
A.;
Shamsi,
H.;
Jabehdar-maralani,
P.
A New Technique for Design CMOS LNA for Multi-Standard Receivers
International Symp. on Circuits and Systems (ISCAS), pp. 3231-3234, Kobe (Japan)
Mai 2005
A New Technique for Design CMOS LNA for Multi-Standard Receivers
International Symp. on Circuits and Systems (ISCAS), pp. 3231-3234, Kobe (Japan)
Mai 2005
115.
Zahabi,
A.;
Shoaei,
O.;
Koolivand,
Y.;
Jabehdar-maralani,
P.
A 2/5 mW CMOS DS Modulator Employed in an Improved GSM/UMTS Receiver Structure
IEICE Electron. Express, Vol.2, No.8, pp. 267-273
April 2005
A 2/5 mW CMOS DS Modulator Employed in an Improved GSM/UMTS Receiver Structure
IEICE Electron. Express, Vol.2, No.8, pp. 267-273
April 2005
114.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
A Case Study On A 2-1-1 Cascaded Continuous-Time Sigma-Delta Modulator
IEEE Trans. on Circuits and Systems I, Vol.52, No.8, pp. 1515-1525
2005
A Case Study On A 2-1-1 Cascaded Continuous-Time Sigma-Delta Modulator
IEEE Trans. on Circuits and Systems I, Vol.52, No.8, pp. 1515-1525
2005
113.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
A Continuous-Time Sigma-Delta Modulator with Reduced Sensitivity to Clock Jitter through SCR-feedback
IEEE Trans. on Circuits and Systems I, Vol.52, No.5, pp. 875-884
2005
A Continuous-Time Sigma-Delta Modulator with Reduced Sensitivity to Clock Jitter through SCR-feedback
IEEE Trans. on Circuits and Systems I, Vol.52, No.5, pp. 875-884
2005
112.
Ortmanns,
M.;
Gerfers,
F.;
Manoli,
Y.
Increased Jitter Sensitivity in Continuous- and Discrete-Time Sigma-Delta Modulators due to finite OpAmp Settling Speed
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kobe, Japan
2005
Increased Jitter Sensitivity in Continuous- and Discrete-Time Sigma-Delta Modulators due to finite OpAmp Settling Speed
IEEE Int. Symp. on Circuits and Systems (ISCAS), Kobe, Japan
2005
111.
Koolivand,
Y.;
Shoaei,
O.;
Zahabi,
A.;
Jabehdar-maralani,
P.
A Complete Analysis of Noise in Inductively Source Degenerated CMOS LNA’s
IEICE Electron. Express, Vol.2, No.1, pp. 25-31
Januar 2005
A Complete Analysis of Noise in Inductively Source Degenerated CMOS LNA’s
IEICE Electron. Express, Vol.2, No.1, pp. 25-31
Januar 2005
110.
Zahabi,
A.;
Shoaei,
O.;
Koolivand,
Y.;
Jabehdar-maralani,
P.
A Two-Stage Genetic Algorithm Method for Optimization the Δ∑ Modulators
In Proc. of IEEE Asia South Pacific Design Automated Conference (ASP-DAC), Vol. 2, pp. 1212-1215, Shanghai (China), January
2005
A Two-Stage Genetic Algorithm Method for Optimization the Δ∑ Modulators
In Proc. of IEEE Asia South Pacific Design Automated Conference (ASP-DAC), Vol. 2, pp. 1212-1215, Shanghai (China), January
2005
109.
Zahabi,
A.;
Shoaei,
O.;
Koolivand,
Y.;
Jabehdar-maralani,
P.
A Δ∑ Modulator with Low Power Consumption and Low Capacitor Spread for GSM/UMTS Receiver
In Proc. of Iranian Conference On Electrical Engineering (ICEE), pp. 531–536, Zanjan (Iran), April
2005
A Δ∑ Modulator with Low Power Consumption and Low Capacitor Spread for GSM/UMTS Receiver
In Proc. of Iranian Conference On Electrical Engineering (ICEE), pp. 531–536, Zanjan (Iran), April
2005
108.
Afzal,
B.;
Zahabi,
A.;
Amirabadi,
A.;
Koolivand,
Y.;
Afzali-Kusha,
A.;
El Nokali,
M.
Analytical Model for C–V Characteristic of Fully Depleted SOI–MOS Capacitors
Solid State Electronics (SSE),Vol. 49, Issue 8, pp. 1262-1273, August
2005
Analytical Model for C–V Characteristic of Fully Depleted SOI–MOS Capacitors
Solid State Electronics (SSE),Vol. 49, Issue 8, pp. 1262-1273, August
2005
107.
Zahabi,
A.;
Shoaei,
O.;
Koolivand,
Y.
Design of a Band-pass Pseudo-2-path Switched Capacitor Ladder Filter
In Proc. of International Symposium on Quality Electronic Design (ISQED), pp. 662–667, San Jose (CA USA), March
2005
Design of a Band-pass Pseudo-2-path Switched Capacitor Ladder Filter
In Proc. of International Symposium on Quality Electronic Design (ISQED), pp. 662–667, San Jose (CA USA), March
2005
106.
Zhang,
C.;
Günter,
Ch.;
Rothermel,
A.
Hardware Implementation of an Entropy Encoder for JPEG2000
Austrochip, Vienna, Austria
2005
Hardware Implementation of an Entropy Encoder for JPEG2000
Austrochip, Vienna, Austria
2005
105.
Tischler,
K.;
Clauss,
M.;
Guenter,
Y.;
Kaempchen,
N.;
Schreier,
R.;
Stiegeler,
M.
Networked environment description for advanced driver assistance systems
Intelligent Transportation Systems, Proceedings IEEE, Page(s):785 - 790
2005
Networked environment description for advanced driver assistance systems
Intelligent Transportation Systems, Proceedings IEEE, Page(s):785 - 790
2005