Publikationen (Gesamt)
2020
551.
Rajabzadeh,
M.;
Häberle,
M.;
Becker,
J.;
Ortmanns,
M.
Comparison Study of DAC Realizations in Current Input CTΣΔ Modulators
IEEE Transactions on Circuits and Systems II: Express Briefs
Juli 2020
Comparison Study of DAC Realizations in Current Input CTΣΔ Modulators
IEEE Transactions on Circuits and Systems II: Express Briefs
Juli 2020
| DOI: | 10.1109/TCSII.2020.3007964 |
550.
Reich,
S.;
Sporer,
M.;
Ortmanns,
M.
A self-compensated, low-offset Voltage Buffer for Input Impedance Boosting in Chopped Neural Front-ends
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain
Mai 2020
A self-compensated, low-offset Voltage Buffer for Input Impedance Boosting in Chopped Neural Front-ends
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain
Mai 2020
549.
Becker,
J.;
Rossak,
P.;
Herkle,
A.;
Mandry,
H.;
Ortmanns,
M.
Comparison of measurement and readout strategies for RO-PUFs on Xilinx Zynq-7000 SoC FPGAs
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain
Mai 2020
Comparison of measurement and readout strategies for RO-PUFs on Xilinx Zynq-7000 SoC FPGAs
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain
Mai 2020
548.
Herkle,
A.;
Mandry,
H.;
Becker,
J.;
Reich,
S.;
Sporer,
M.;
Ortmanns,
M.
Extracting Weak PUFs from Differential Nonlinearity of Digital-to-Analog Converters
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain
Mai 2020
Extracting Weak PUFs from Differential Nonlinearity of Digital-to-Analog Converters
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain
Mai 2020
547.
Herkle,
A.;
Mandry,
H.;
Becker,
J.;
Ortmanns,
M.
Live Demonstration: Generating FPGA Fingerprints utilizing Full-Chip Characterization with Ring-Oscillator PUFs
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain
Mai 2020
Live Demonstration: Generating FPGA Fingerprints utilizing Full-Chip Characterization with Ring-Oscillator PUFs
IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain
Mai 2020
546.
Conrad,
J.;
Vogelmann,
P.;
Mokhtar,
M.;
Ortmanns,
M.
Design Approach for Ring Amplifiers
IEEE Transactions on Circuits and Systems I: Regular Papers
April 2020
Design Approach for Ring Amplifiers
IEEE Transactions on Circuits and Systems I: Regular Papers
April 2020
| DOI: | 10.1109/TCSI.2020.2986553 |
545.
Mandry,
H.;
Herkle,
A.;
Müelich,
S.;
Becker,
J.;
Fischer,
R.;
Ortmanns,
M.
Normalization and Multi-Valued Symbol Extraction from RO-PUFs for Enhanced Uniform Probability Distributions
IEEE Transactions on Circuits and Systems--II: Express Briefs
März 2020
Normalization and Multi-Valued Symbol Extraction from RO-PUFs for Enhanced Uniform Probability Distributions
IEEE Transactions on Circuits and Systems--II: Express Briefs
März 2020
| DOI: | 10.1109/TCSII.2020.2980748 |
544.
Wagner,
J.;
Vogelmann,
P.;
Ortmanns,
M.
Performance Evaluation of Incremental Sigma-Delta ADCs Based on their NTF
IEEE Transactions on Circuits and Systems—II: Express Briefs (Early Access)
März 2020
Performance Evaluation of Incremental Sigma-Delta ADCs Based on their NTF
IEEE Transactions on Circuits and Systems—II: Express Briefs (Early Access)
März 2020
543.
Qi,
L.;
Jain,
A.;
Jiang,
D.;
Sin,
S.;
Martins,
R. P.;
Ortmanns,
M.
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH With DAC Non-Linearity Tolerance
IEEE Journal of Solid-State Circuits
Februar 2020
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH With DAC Non-Linearity Tolerance
IEEE Journal of Solid-State Circuits
Februar 2020
| DOI: | 10.1109/JSSC.2019.2942359 |
2019
542.
Wagner,
J.;
Vogelmann,
P.;
Ortmanns,
M.
On the Signal Filtering Property of CT Incremental Sigma-Delta ADCs
IEEE Transactions on Circuits and Systems—II: Express Briefs
November 2019
On the Signal Filtering Property of CT Incremental Sigma-Delta ADCs
IEEE Transactions on Circuits and Systems—II: Express Briefs
November 2019
541.
Rajabzadeh,
M.;
Ungethüm,
J.;
Herkle,
A.;
Schilpp,
C.;
Fauler,
M.;
Wittekindt,
O.;
Ortmanns,
M.
A 24-Ch. Multi-Electrode Array Allowing Fast EIS to Determine Transepithelial Electrical Resistance
2019 IEEE Biomedical Circuits and Systems Conference (BioCAS), Nara, Japan
Oktober 2019
A 24-Ch. Multi-Electrode Array Allowing Fast EIS to Determine Transepithelial Electrical Resistance
2019 IEEE Biomedical Circuits and Systems Conference (BioCAS), Nara, Japan
Oktober 2019
540.
Mokhtar,
M.;
Vogelmann,
P.;
Haas,
M.;
Ortmanns,
M.
A 94.3 dB SFDR, 91.5 dB DR, 200 kS/s CT Incremental Delta-Sigma Modulator with Differentially Reset FIR Feedback
IEEE Solid-State Circuits Letter, September 2019 - Presented on IEEE European Solid-State Circuits conference (ESSDERC/ESSCIRC), Krakow, Poland
September 2019
A 94.3 dB SFDR, 91.5 dB DR, 200 kS/s CT Incremental Delta-Sigma Modulator with Differentially Reset FIR Feedback
IEEE Solid-State Circuits Letter, September 2019 - Presented on IEEE European Solid-State Circuits conference (ESSDERC/ESSCIRC), Krakow, Poland
September 2019
539.
Rajabzadeh,
M.;
Häberle,
M.;
Jain,
A.;
Ortmanns,
M.
An Integrated Readout for Current Sensing Based on a Sigma Delta Modulator with Switched Capacitor Feedback
IEEE European Solid-State Circuits conference (ESSDERC/ESSCIRC), Krakow, Poland
September 2019
An Integrated Readout for Current Sensing Based on a Sigma Delta Modulator with Switched Capacitor Feedback
IEEE European Solid-State Circuits conference (ESSDERC/ESSCIRC), Krakow, Poland
September 2019
538.
Nikas,
A.;
Jambunathan,
S.;
Klein,
L.;
Völker,
M.;
Ortmanns,
M.
A Continuous-Time Delta-Sigma Modulator Using a Modified Instrumentation Amplifier and Current Reuse DAC for Neural Recording
IEEE Journal of Solid-State Circuits PP(99):1-13
August 2019
A Continuous-Time Delta-Sigma Modulator Using a Modified Instrumentation Amplifier and Current Reuse DAC for Neural Recording
IEEE Journal of Solid-State Circuits PP(99):1-13
August 2019
| DOI: | 10.1109/JSSC.2019.2931811 |
537.
Rajabzadeh,
M.;
Häberle,
M.;
Ortmanns,
M.
Comparison of Direct Digitization Current Sensing Circuits for EIS
15th Conference on PhD Research in Microelectronics and Electronics (PRIME 2019), Lausanne, Switzerland
Juli 2019
Comparison of Direct Digitization Current Sensing Circuits for EIS
15th Conference on PhD Research in Microelectronics and Electronics (PRIME 2019), Lausanne, Switzerland
Juli 2019
536.
Chi,
J.;
Mandry,
H.;
Ortmanns,
M.
Finite Gain-Bandwidth of Q Enhancement in Bandpass CT ΣΔ Modulator and Compensation
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, pp. 1-5.
Mai 2019
Finite Gain-Bandwidth of Q Enhancement in Bandpass CT ΣΔ Modulator and Compensation
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, pp. 1-5.
Mai 2019
535.
Mandry,
H.;
Herkle,
A.;
Kürzinger,
L.;
Müelich,
S.;
Becker,
J.;
Fischer,
R.;
Ortmanns,
M.
Modular PUF Coding Chain with High-Speed Reed-Muller Decoder
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan
Mai 2019
Modular PUF Coding Chain with High-Speed Reed-Muller Decoder
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan
Mai 2019
534.
Luo,
Y.;
Jain,
A.;
Wagner,
J.;
Ortmanns,
M.
Input Referred Comparator Noise in SAR ADCs
IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 5, pp. 718-722
Mai 2019
Input Referred Comparator Noise in SAR ADCs
IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 5, pp. 718-722
Mai 2019
| DOI: | 10.1109/TCSII.2019.2909429 |
533.
Herkle,
A.;
Mandry,
H.;
Becker,
J.;
Ortmanns,
M.
In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs
IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Tysons Corner, USA
Mai 2019
In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs
IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Tysons Corner, USA
Mai 2019
| DOI: | 10.18725/OPARU-14107 |
532.
Mokhtar,
M.;
Vogelmann,
P.;
Wagner,
J.;
Ortmanns,
M.
Incremental Sturdy-MASH Sigma-Delta Modulator with Reduced Sensitivity to DAC Mismatch
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan
Mai 2019
Incremental Sturdy-MASH Sigma-Delta Modulator with Reduced Sensitivity to DAC Mismatch
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan
Mai 2019
531.
Jain,
A.;
Abdelaal,
A.;
Ortmanns,
M.
Effective Filtering of Requantization Error in Dual Quantized CTDSM using FIR DAC
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, pp. 1-5.
Mai 2019
Effective Filtering of Requantization Error in Dual Quantized CTDSM using FIR DAC
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, pp. 1-5.
Mai 2019
530.
Rajabzadeh,
M.;
Ungethüm,
J.;
Mandry,
H.;
Schilpp,
C.;
Wittekindt,
O.;
Ortmanns,
M.
An Evaluation Study of Various Excitation Signals for Electrical Impedance Spectroscopy
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan
Mai 2019
An Evaluation Study of Various Excitation Signals for Electrical Impedance Spectroscopy
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan
Mai 2019
529.
Gambach,
S.;
Kaim,
H.;
Schütz,
H.;
Steinhoff,
R.;
Moll,
S.;
Rothermel,
A.
Evaluierung einer getakteten Leistungsregelung für biomedizinische Implantate
Analogworkshop 2019, Universität Stuttgart
März 2019
Evaluierung einer getakteten Leistungsregelung für biomedizinische Implantate
Analogworkshop 2019, Universität Stuttgart
März 2019
528.
Kaim,
H.;
Gambach,
S.;
Schütz,
H.;
Steinhoff,
R.;
Moll,
S.;
Rothermel,
A.
Implementierung einer automatischen Helligkeitsregelung für ein subretinales Implantat
Analogworkshop 2019, Universität Stuttgart
März 2019
Implementierung einer automatischen Helligkeitsregelung für ein subretinales Implantat
Analogworkshop 2019, Universität Stuttgart
März 2019
527.
Luo,
Y.;
Jain,
A.;
Ortmanns,
M.
A Multi-bit Delta-Sigma DAC Architecture with Internal DAC Non-linearity Suppression
Analogworkshop 2019, Universität Stuttgart
März 2019
A Multi-bit Delta-Sigma DAC Architecture with Internal DAC Non-linearity Suppression
Analogworkshop 2019, Universität Stuttgart
März 2019