Circuit Design in Nanometer-Scaled CMOS Technologies

Module Description

In this module, we will introduce important problems associated with designing in nano-meter-scaled CMOS design technologies. The course begins with reviewing the issues with the square law model and how it breaks down in nano-meter design. The advanced charge-based model is introduced to fill this gap in order to get a new feeling of designing with short channel effects. After reviewing the operation regions of the MOSFET, we further review thermal and 1/f noise effects taking into account the newly introduced modelling. After looking into various layout techniques, the course continues with designing single stage amplifiers and investigating different output stages and their effects on performance. Both singled ended and differential topologies will be discussed, while going further into more complex compensation techniques resulting in the introduction to multistage/multipath operational amplifier design. To conclude the course, we review operational amplifier stability metrics and dive into advanced test benches to include parasitics loading which makes possible stable systems at low power and/or high speed.

Module Contents

  1. MOSFET operation and modern CMOS devices
  2. Short and narrow channel effects in advanced nm CMOS technologies
  3. Advanced Noise Modeling
  4. Layout and Matching Techniques
  5. Single-Stage OpAmp design
  6. Multi-Stage OpAmp design
  7. Fully-Differential OpAmps
  8. Stability and OpAmp Testbenches
  9. State-of-the-Art Design Examples