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ahmed.abdelaal(at)uni-ulm.de
M.Sc. Ahmed Abdelaal
Ahmed Abdelaal erhielt 2016 den B. Sc-Abschluss in Elektrotechnik von der Deutschen Universität Kairo (GUC), Ägypten. Anschließend erhielt er 2018 den M.Sc.-Abschluss von der Universität Ulm, Deutschland, wo er derzeit unter der Leitung von Professor Dr. Ing. an seiner Promotion arbeitet. Maurits Ortmanns. Sein Forschungsinteresse gilt Hochgeschwindigkeits-Sigma-Delta-Modulatoren mit kontinuierlicher Zeit.
Studentische Arbeiten
[mt] = Masterarbeit, [rp] = Bachelorarbeit
Publikationen
2025
15.
Conrad,
J.;
Wilhelmstätter,
S.;
Mandry,
H.;
Kässer,
P.;
Abdelaal,
A.;
Asthana,
R.;
Belagiannis,
V.;
Ortmanns,
M.
PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector Multipliers
IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom
Mai 2025
PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector Multipliers
IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom
Mai 2025
| DOI: | 10.1109/ISCAS56072.2025.11043442 |
14.
Conrad,
J.;
Wilhelmstätter,
S.;
Mandry,
H.;
Kässer,
P.;
Abdelaal,
A.;
Asthana,
R.;
Belagiannis,
V.;
Ortmanns,
M.
PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector Multipliers
IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom, pp. 1-5
Mai 2025
PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector Multipliers
IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom, pp. 1-5
Mai 2025
| DOI: | 10.1109/ISCAS56072.2025.11043442 |
13.
Dalla Longa,
M.;
Conzatti,
F.;
Ismail,
O.;
Abdelaal,
A.;
Kauffman,
J. G.;
Ortmanns,
M.
A 470-μW, 102.6-dB DR, 20-kHz BW Calibration-Free ΔΣ Modulator With SFDR in Excess of 110 dBc Using an Intrinsically Linear 13-Level DAC
IEEE Journal of Solid-State Circuits ( Early Access ), Page(s): 1 - 0
April 2025
A 470-μW, 102.6-dB DR, 20-kHz BW Calibration-Free ΔΣ Modulator With SFDR in Excess of 110 dBc Using an Intrinsically Linear 13-Level DAC
IEEE Journal of Solid-State Circuits ( Early Access ), Page(s): 1 - 0
April 2025
| DOI: | 10.1109/JSSC.2025.3553310 |
12.
Wiens,
D.-P.;
Abdelaal,
A.;
Driemeyer,
B.;
Becker,
J.;
Kauffman,
J. G.;
Ortmanns,
M.
A Direct Digitizing, 1MHz Bandwidth, 28fA/√Hz Current Sensing Front-End Based on a Mixed-Signal Integrator-Differentiator TIA in 28nm CMOS
IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA
April 2025
A Direct Digitizing, 1MHz Bandwidth, 28fA/√Hz Current Sensing Front-End Based on a Mixed-Signal Integrator-Differentiator TIA in 28nm CMOS
IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA
April 2025
| DOI: | 10.1109/CICC63670.2025.10983397 |
2024
11.
Abdelaal,
A.;
Pietzko,
M.;
Kauffman,
J. G.;
Jain,
A.;
Ortmanns,
M.
ΔΣ Modulators Employing MASH DSM DAC-Based Dual Quantization
IEEE Transactions on Circuits and Systems I: Regular Papers ( Volume: 72, Issue: 1, Page(s) 71-84, January 2025)
August 2024
ΔΣ Modulators Employing MASH DSM DAC-Based Dual Quantization
IEEE Transactions on Circuits and Systems I: Regular Papers ( Volume: 72, Issue: 1, Page(s) 71-84, January 2025)
August 2024
| DOI: | 10.1109/TCSI.2024.3448224 |
10.
Abdelaal,
A.;
Pietzko,
M.;
Ungethüm,
J.;
Kauffman,
J. G.;
Ortmanns,
M.
Using Negative-R Assisted Integrators in Wide-band Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
Juli 2024
Using Negative-R Assisted Integrators in Wide-band Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
Juli 2024
| DOI: | 10.1109/ISCAS58744.2024.10558442 |
9.
Pietzko,
M.;
Ungethüm,
J.;
Abdelaal,
A.;
Kauffman,
J. G.;
Ortmanns,
M.
A 600MS/s 10-bit SAR ADC with unit via-based delta-length C-DAC in 22nm FDSOI
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
Mai 2024
A 600MS/s 10-bit SAR ADC with unit via-based delta-length C-DAC in 22nm FDSOI
IEEE International Symposium on Circuits and Systems (ISCAS), Singapore
Mai 2024
| DOI: | 10.1109/ISCAS58744.2024.10558087 |
2023
8.
Ungethüm,
J.;
Pietzko,
M.;
Abdelaal,
A.;
Kauffman,
J. G.;
Ortmanns,
M.
A Chopped 6-bit 1.6 GS/s SAR ADC Utilizing Slow Decision Information in 22 nm FDSOI
ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)
September 2023
A Chopped 6-bit 1.6 GS/s SAR ADC Utilizing Slow Decision Information in 22 nm FDSOI
ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC)
September 2023
| DOI: | 10.1109/ESSCIRC59616.2023.10268704 |
2022
7.
Mokhtar,
M. A.;
Abdelaal,
A.;
Sporer,
M.;
Becker,
J.;
Kauffman,
J. G.;
Ortmanns,
M.
A 0.9-V DAC-Calibration-Free Continuous-Time Incremental Delta-Sigma Modulator Achieving 97-dB SFDR at 2 MS/s in 28-nm CMOS
IEEE Journal of Solid-State Circuits, Volume: 57, Issue: 11
November 2022
A 0.9-V DAC-Calibration-Free Continuous-Time Incremental Delta-Sigma Modulator Achieving 97-dB SFDR at 2 MS/s in 28-nm CMOS
IEEE Journal of Solid-State Circuits, Volume: 57, Issue: 11
November 2022
| DOI: | 10.1109/JSSC.2022.3160325 |
2021
6.
Abdelaal,
A.;
Pietzko,
M.;
Mokhtar,
M. A.;
Kauffman,
J. G.;
Ortmanns,
M.
FIR filter with Symmetric Non-Equal Coefficients for CT Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea (Online)
Mai 2021
FIR filter with Symmetric Non-Equal Coefficients for CT Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea (Online)
Mai 2021
5.
Pietzko,
M.;
Wagner,
J.;
Abdelaal,
A.;
Kauffman,
J. G.;
Ortmanns,
M.
Influence of Excess Loop Delay on the STF of Continuous-Time Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea (Online)
Mai 2021
Influence of Excess Loop Delay on the STF of Continuous-Time Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea (Online)
Mai 2021
4.
Mokhtar,
M. A.;
Abdelaal,
A.;
Sporer,
M.;
Becker,
J.;
Kauffman,
J. G.;
Ortmanns,
M.
A 0.9-V Calibration-Free 97dB-SFDR 2-MS/s ContinuousTime Incremental Delta-Sigma ADC Utilizing Variable Bit-Width Quantizer in 28nm CMOS
IEEE Custom Integrated Circuits Conference (CICC), Texas, USA (Virtual)
April 2021
A 0.9-V Calibration-Free 97dB-SFDR 2-MS/s ContinuousTime Incremental Delta-Sigma ADC Utilizing Variable Bit-Width Quantizer in 28nm CMOS
IEEE Custom Integrated Circuits Conference (CICC), Texas, USA (Virtual)
April 2021
2020
3.
Abdelaal,
A.;
Kauffman,
J. G.;
Mokhtar,
M. A.;
Ortmanns,
M.
A Comparative Study of ISI Errors in Different DAC Structures for CT Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, Spain
Oktober 2020
A Comparative Study of ISI Errors in Different DAC Structures for CT Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, Spain
Oktober 2020
2.
Mokhtar,
M. A.;
Vogelmann,
P.;
Abdelaal,
A.;
Kauffman,
J. G.;
Ortmanns,
M.
FIR DACs in CT Incremental Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, Spain
Oktober 2020
FIR DACs in CT Incremental Delta-Sigma Modulators
IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, Spain
Oktober 2020
2019
1.
Jain,
A.;
Abdelaal,
A.;
Ortmanns,
M.
Effective Filtering of Requantization Error in Dual Quantized CTDSM using FIR DAC
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, pp. 1-5.
Mai 2019
Effective Filtering of Requantization Error in Dual Quantized CTDSM using FIR DAC
IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, pp. 1-5.
Mai 2019
Wissenschaftl. Mitarbeiter
