Prof. Dr.-Ing. Michael Glaß
Stellv. Institutsdirektor
Forschung
- Entwurfsautomatisierung eingebetteter Systeme
- Zuverlässigkeitsanalyse und -optimierung
- Echtzeitanalyse und -modellierung
- Meta-heuristische Optimierung
- Automotive Systeme
Lehre
Im Wintersemester:
- Vorlesung Grundlagen der Rechnerarchitektur
- Vorlesung Verifikation digitaler Systeme
- Seminar Zuverlässigkeitsanalyse eingebetteter Systeme
Im Sommersemester:
- Vorlesung Dependable Embedded Systems
- Vorlesung Spezifikation eingebetteter Systeme
- Seminar Entwurfsraumexploration eingebetteter Systeme
Projekte:
- Automatischer Entwurf zuverlässiger eingebetteter Systeme
- Hybride Optimierung im Entwurf eingebetteter Systeme
Funktion
Stellvertretender Institutsdirektor
Kontakt
Raum O27/318
Institut für Eingebettete Systeme/Echtzeitsysteme
Fakultät für Ingenieurwissenschaften, Informatik und Psychologie
Universität Ulm
Albert-Einstein-Allee 11, 89081 Ulm
Tel: +497315024181 (Sekretariat)
Fax: +497315024182
michael.glass(at)uni-ulm.de
PGP-/GPG-Schlüssel
Sprechzeiten
Dienstag, 15:00-16:00 Uhr
Um vorherige Terminabsprache mit Frau Porada wird gebeten.
Publikationen
2016
100.
Herglotz,
Christian;
Rosales,
Rafael;
Glaß,
Michael;
Teich,
Jürgen;
Kaup,
André
Multi-Objective Design Space Exploration for the Optimization of the HEVC Mode Decision Process
In Proceedings of the Picture Coding Symposium (PCS)
Picture Coding Symposium (PCS)
Nuremberg, Germany
Dezember 2016
Multi-Objective Design Space Exploration for the Optimization of the HEVC Mode Decision Process
In Proceedings of the Picture Coding Symposium (PCS)
Picture Coding Symposium (PCS)
Nuremberg, Germany
Dezember 2016
99.
Wildermann,
Stefan;
Bader,
Michael;
Bauer,
Lars;
Damschen,
Marvin;
Gabriel,
Dirk;
Gerndt,
Michael;
Glaß,
Michael;
Henkel,
Jörg;
Paul,
Johnny;
Pöppl,
Alexander;
Roloff,
Sascha;
Schwarzer,
Tobias;
Snelting,
Gregor;
Stechele,
Walter;
Teich,
Jürgen;
Weichslgartner,
Andreas;
Zwinkau,
Andreas
Invasive computing for timing-predictable stream processing on MPSoCs
it - Information Technology, 58 (6) :267 - 280
Dezember 2016
Invasive computing for timing-predictable stream processing on MPSoCs
it - Information Technology, 58 (6) :267 - 280
Dezember 2016
| DOI: | 10.1515/itit-2016-0021 |
98.
Pöppl,
Alexander;
Bader,
Michael;
Schwarzer,
Tobias;
Glaß,
Michael
Simulating shallow water waves with lazy activation of patches using ActorX10
In Proceedings of the Second International Workshop on Extreme Scale Programming Models and Middleware (ESPM2), Seite 32 - 39
Second International Workshop on Extreme Scale Programming Models and Middleware (ESPM2)
Salt Lake City, U.S.A.
November 2016
Simulating shallow water waves with lazy activation of patches using ActorX10
In Proceedings of the Second International Workshop on Extreme Scale Programming Models and Middleware (ESPM2), Seite 32 - 39
Second International Workshop on Extreme Scale Programming Models and Middleware (ESPM2)
Salt Lake City, U.S.A.
November 2016
| DOI: | 10.1109/ESPM2.2016.9 |
97.
Borgonovo,
Emanuele;
Aliee,
Hananeh;
Glaß,
Michael;
Teich,
Jürgen
A new time-independent reliability importance measure
European Journal of Operational Research, 254 (2) :427-442
Oktober 2016
A new time-independent reliability importance measure
European Journal of Operational Research, 254 (2) :427-442
Oktober 2016
| DOI: | 10.1016/j.ejor.2016.03.054 |
96.
Teich,
Jürgen;
Glaß,
Michael;
Roloff,
Sascha;
Schroeder Preikschat,
Wolfgang;
Snelting,
Gregor;
Weichslgartner,
Andreas;
Wildermann,
Stefan
Language and Compilation of Parallel Programs for *-Predictable MPSoC Execution using Invasive Computing
Proceedings of IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Seite 313-320
IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)
Lyon, France
September 2016
Language and Compilation of Parallel Programs for *-Predictable MPSoC Execution using Invasive Computing
Proceedings of IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Seite 313-320
IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)
Lyon, France
September 2016
| DOI: | 10.1109/MCSoC.2016.30 |
95.
Aliee,
Hananeh;
Vitzethum,
Stefan;
Glaß,
Michael;
Teich,
Jürgen;
Borgonovo,
Emanuele
Guiding Genetic Algorithms Using Importance Measures for Reliable Design of Embedded Systems
Proceedings of the Defect and Fault Tolerance in VLSI and Nanotechnology Systems Symposium (DFT), Seite 53 - 56
29th Defect and Fault Tolerance in VLSI and Nanotechnology Systems Symposium (DFT)
Stores, Connecticut, U.S.A.
September 2016
Guiding Genetic Algorithms Using Importance Measures for Reliable Design of Embedded Systems
Proceedings of the Defect and Fault Tolerance in VLSI and Nanotechnology Systems Symposium (DFT), Seite 53 - 56
29th Defect and Fault Tolerance in VLSI and Nanotechnology Systems Symposium (DFT)
Stores, Connecticut, U.S.A.
September 2016
| DOI: | 10.1109/DFT.2016.7684069 |
94.
Neubauer,
Kai;
Haubelt,
Christian;
Glaß,
Michael
Supporting Composition in Symbolic System Synthesis
Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), Seite 132 - 139
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)
Samos, Greece
Juli 2016
Supporting Composition in Symbolic System Synthesis
Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), Seite 132 - 139
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)
Samos, Greece
Juli 2016
| DOI: | 10.1109/SAMOS.2016.7818340 |
93.
Roloff,
Sascha;
Pöppl,
Alexander;
Schwarzer,
Tobias;
Wildermann,
Stefan;
Bader,
Michael;
Glaß,
Michael;
Hannig,
Frank;
Teich,
Jürgen
ActorX10: An Actor Library for X10
Proceedings of the Sixth ACM SIGPLAN X10 Workshop (X10), Seite 24-29
Sixth ACM SIGPLAN X10 Workshop (X10)
Santa Barbara, U.S.A.
Juni 2016
ActorX10: An Actor Library for X10
Proceedings of the Sixth ACM SIGPLAN X10 Workshop (X10), Seite 24-29
Sixth ACM SIGPLAN X10 Workshop (X10)
Santa Barbara, U.S.A.
Juni 2016
| DOI: | 10.1145/2931028.2931033 |
92.
Smirnov,
Fedor;
Glaß,
Michael;
Reimann,
Felix;
Teich,
Jürgen
Formal Reliability Analysis of Switched Ethernet Automotive Networks under Transient Transmission Errors
Proceedings of the 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), Seite 6
53nd ACM/EDAC/IEEE Design Automation Conference (DAC)
Austin, U.S.A.
Juni 2016
Formal Reliability Analysis of Switched Ethernet Automotive Networks under Transient Transmission Errors
Proceedings of the 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), Seite 6
53nd ACM/EDAC/IEEE Design Automation Conference (DAC)
Austin, U.S.A.
Juni 2016
| DOI: | 10.1145/2897937.2898026 |
91.
Weichslgartner,
Andreas;
Wildermann,
Stefan;
Götzfried,
Johannes;
Freiling,
Felix;
Glaß,
Michael;
Teich,
Jürgen
Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES), Seite 153-162
19th International Workshop on Software and Compilers for Embedded Systems (SCOPES)
St. Goar, Germany
Mai 2016
Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES), Seite 153-162
19th International Workshop on Software and Compilers for Embedded Systems (SCOPES)
St. Goar, Germany
Mai 2016
| DOI: | 10.1145/2906363.2906370 |
90.
Rosales,
Rafael;
Herglotz,
Christian;
Glaß,
Michael;
Kaup,
André;
Teich,
Jürgen
Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-Based Modeling
Proceedings of the International Conference on Architecture of Computing Systems (ARCS), Seite 263-276
International Conference on Architecture of Computing Systems (ARCS)
Nuremberg, Germany
April 2016
Analysis and Exploitation of CTU-Level Parallelism in the HEVC Mode Decision Process Using Actor-Based Modeling
Proceedings of the International Conference on Architecture of Computing Systems (ARCS), Seite 263-276
International Conference on Architecture of Computing Systems (ARCS)
Nuremberg, Germany
April 2016
| DOI: | 10.1007/978-3-319-30695-7_20 |
89.
Wang,
Bo;
Xu,
Yang;
Hasholzner,
Ralph;
Drewes,
Christian;
Rosales,
Rafael;
Graf,
Sebastian;
Falk,
Joachim;
Glaß,
Michael;
Teich,
Jürgen
Exploration of Power Domain Partitioning for Application-Specific SoCs in System-Level Design
Proceedings of Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Seite 102-113
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Freiburg, Germany
März 2016
Exploration of Power Domain Partitioning for Application-Specific SoCs in System-Level Design
Proceedings of Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Seite 102-113
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Freiburg, Germany
März 2016
| DOI: | 10.6094/UNIFR/10617 |
88.
Gerndt,
Hans Michael;
Glaß,
Michael;
Parameswaran,
Sri;
Rountree,
Barry L.
Dark Silicon: From Embedded to HPC Systems (Dagstuhl Seminar 16052)
Dagstuhl Reports, 6 (1) :224-244
2016
Dark Silicon: From Embedded to HPC Systems (Dagstuhl Seminar 16052)
Dagstuhl Reports, 6 (1) :224-244
2016
| DOI: | 10.4230/DagRep.6.1.224 |
2015
87.
Falk,
Joachim;
Schwarzer,
Tobias;
Glaß,
Michael;
Teich,
Jürgen;
Zebelein,
Christian;
Haubelt,
Christian
Quasi-Static Scheduling of Data Flow Graphs in the Presence of Limited Channel Capacities
Proceedings of the 13th IEEE Symposium on Embedded Systems for Real-time Multimedia (ESTIMEDIA), Seite 10
13th IEEE Symposium on Embedded Systems for Real-time Multimedia (ESTIMEDIA)
Amsterdam, The Netherlands
Oktober 2015
Quasi-Static Scheduling of Data Flow Graphs in the Presence of Limited Channel Capacities
Proceedings of the 13th IEEE Symposium on Embedded Systems for Real-time Multimedia (ESTIMEDIA), Seite 10
13th IEEE Symposium on Embedded Systems for Real-time Multimedia (ESTIMEDIA)
Amsterdam, The Netherlands
Oktober 2015
| DOI: | 10.1109/ESTIMedia.2015.7351766 |
86.
Falk,
Joachim;
Schwarzer,
Tobias;
Zhang,
Liyuan;
Glaß,
Michael;
Teich,
Jürgen
Automatic Communication-driven Virtual Prototyping and Design for Networked Embedded Systems
Microprocessors and Microsystems, 39 (8) :1012-1028
Oktober 2015
Automatic Communication-driven Virtual Prototyping and Design for Networked Embedded Systems
Microprocessors and Microsystems, 39 (8) :1012-1028
Oktober 2015
| DOI: | 10.1016/j.micpro.2015.08.008 |
85.
Aliee,
Hananeh;
Borgonovo,
Emanuele;
Glaß,
Michael;
Teich,
Jürgen
Importance Measures in Time-dependent Reliability Analysis and System Design
Proceedings of the Annual European Safety and Reliability Conference (ESREL),
Annual European Safety and Reliability Conference (ESREL)
Zurich, Switzerland
September 2015
Importance Measures in Time-dependent Reliability Analysis and System Design
Proceedings of the Annual European Safety and Reliability Conference (ESREL),
Annual European Safety and Reliability Conference (ESREL)
Zurich, Switzerland
September 2015
84.
Graf,
Sebastian;
Reinhard,
Sebastian;
Glaß,
Michael;
Teich,
Jürgen;
Platte,
Daniel
Robust Design of E/E Architecture Component Platforms
Proceedings of the 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), Seite 6
52nd ACM/EDAC/IEEE Design Automation Conference (DAC)
San Francisco, U.S.A.
Juni 2015
Robust Design of E/E Architecture Component Platforms
Proceedings of the 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), Seite 6
52nd ACM/EDAC/IEEE Design Automation Conference (DAC)
San Francisco, U.S.A.
Juni 2015
| DOI: | 10.1145/2744769.2747941 |
83.
Schwarzer,
Tobias;
Falk,
Joachim;
Glaß,
Michael;
Teich,
Jürgen;
Zebelein,
Christian;
Haubelt,
Christian
Throughput-optimizing Compilation of Dataflow Applications for Multi-Cores using Quasi-Static Scheduling
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES), Seite 68-75
18th International Workshop on Software and Compilers for Embedded Systems (SCOPES)
St. Goar, Germany
Juni 2015
Throughput-optimizing Compilation of Dataflow Applications for Multi-Cores using Quasi-Static Scheduling
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES), Seite 68-75
18th International Workshop on Software and Compilers for Embedded Systems (SCOPES)
St. Goar, Germany
Juni 2015
| DOI: | 10.1145/2764967.2764972 |
82.
Glaß,
Michael;
Aliee,
Hananeh;
Cheng,
Liang;
Ebrahimi,
Mojtaba;
Khosravi,
Faramarz;
Kleeberger,
Veit B.;
Listl,
Alexandra;
Müller-Gritschneider,
Daniel;
Oboril,
Fabian;
Schlichtmann,
Ulf;
Tahoori,
Mehdi B.;
Teich,
Jürgen;
Wehn,
Norbert;
Weis,
Christian
Application-aware cross-layer reliability analysis and optimization
it - Information Technology, 57 (3) :159-169
Juni 2015
Application-aware cross-layer reliability analysis and optimization
it - Information Technology, 57 (3) :159-169
Juni 2015
| DOI: | 10.1515/itit-2014-1080 |
81.
Graf,
Sebastian;
Glaß,
Michael;
Teich,
Jürgen;
Platte,
Daniel
A Methodology for the Optimized Design of an E/E Architecture Component Platform
Proceedings of the 15th Stuttgart International Symposium, Seite 203-215
15th Stuttgart International Symposium
Stuttgart, Germany
März 2015
A Methodology for the Optimized Design of an E/E Architecture Component Platform
Proceedings of the 15th Stuttgart International Symposium, Seite 203-215
15th Stuttgart International Symposium
Stuttgart, Germany
März 2015
| DOI: | 10.1007/978-3-658-08844-6_14 |
80.
Seyler,
Jan R.;
Streichert,
Thilo;
Glaß,
Michael;
Navet,
Nicolas;
Teich,
Jürgen
Formal Analysis of the Startup Delay of SOME/IP Service Discovery
Proceedings of Design, Automation and Test in Europe (DATE), Seite 49-54
Design, Automation and Test in Europe (DATE)
Grenoble, France
März 2015
Formal Analysis of the Startup Delay of SOME/IP Service Discovery
Proceedings of Design, Automation and Test in Europe (DATE), Seite 49-54
Design, Automation and Test in Europe (DATE)
Grenoble, France
März 2015
| DOI: | 10.7873/DATE.2015.0469 |
79.
Khosravi,
Faramarz;
Müller,
Malte;
Glaß,
Michael;
Teich,
Jürgen
Uncertainty-Aware Reliability Analysis and Optimization
Proceedings of Design, Automation and Test in Europe (DATE), Seite 97-102
Design, Automation and Test in Europe (DATE)
Grenoble, France
März 2015
Uncertainty-Aware Reliability Analysis and Optimization
Proceedings of Design, Automation and Test in Europe (DATE), Seite 97-102
Design, Automation and Test in Europe (DATE)
Grenoble, France
März 2015
| DOI: | 10.7873/DATE.2015.0319 |
78.
Graf,
Sebastian;
Glaß,
Michael;
Teich,
Jürgen
Symbolic Message Routing for Multi-Objective Optimization of Automotive E/E Architecture Component Platforms
Proceedings of Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Seite 115-124
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Chemnitz, Germany
März 2015
Symbolic Message Routing for Multi-Objective Optimization of Automotive E/E Architecture Component Platforms
Proceedings of Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Seite 115-124
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
Chemnitz, Germany
März 2015
| ISBN: | 978-3-944640-34-1 |
77.
Zhang,
Liyuan;
Glaß,
Michael;
Ballmann,
Nils;
Teich,
Jürgen
Bridging Algorithm and ESL Design: MATLAB/Simulink Model Transformation and Validation
In Louerat, Marie-Minerve and Maehne, Torsten, Editor, Languages, Design Methods, and Tools for Electronic System Design
Seite 189-206
Januar 2015
189-206
Bridging Algorithm and ESL Design: MATLAB/Simulink Model Transformation and Validation
In Louerat, Marie-Minerve and Maehne, Torsten, Editor, Languages, Design Methods, and Tools for Electronic System Design
Seite 189-206
Januar 2015
189-206
| DOI: | 10.1007/978-3-319-06317-1_10 |
2014
76.
Graf,
Sebastian;
Reimann,
Felix;
Glaß,
Michael;
Teich,
Jürgen
Towards Scalable Symbolic Routing for Multi-Objective Networked Embedded System Design and Optimization
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Seite 2:1-2:10
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
New Delhi, India
Oktober 2014
Towards Scalable Symbolic Routing for Multi-Objective Networked Embedded System Design and Optimization
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Seite 2:1-2:10
International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
New Delhi, India
Oktober 2014
| DOI: | 10.1145/2656075.2656102 |